| 研究課題/領域番号 |
17J09690
|
|---|
| 研究機関 | 東京大学 |
|---|
研究代表者 |
方 楠 東京大学, 大学院工学系研究科, 特別研究員(DC2)
|
|---|
| 研究期間 (年度) |
2017-04-26 – 2019-03-31
|
| キーワード | MoS2 / FET / quantum capacitance / interface states / density of states / MIT / impedance spectroscopy |
|---|
| 研究実績の概要 |
As a summary of the research, the degradation of the electrostatic field-effect control for the monolayer mechanical exfoliated MoS2 FET is systematically studied using both C-V and I-V characterization in terms of CQ and Cit.
Capacitance measurement mechanism based on monolayer MoS2 FET is clarified. CQ was confirmed over all of the measured temperature ranges (75~300 K). Therefore, Dit was evaluated as a function of EF by the newly constructed CQ analysis, which can also be applied for other monolayer TMDs. Dit was extracted as 1012~1013 cm-2 eV-1 with a band tail shape close to the conduction band, which is comparable to that in Si/SiO2.
However, ultra-thin 2D materials are more sensitive to interface disorder due to the reduced DOS, which drastically degrades the subthreshold properties. The multilayer MoS2 is more suitable for device application due to its larger DOS, which was confirmed by the C-V measurement of an ~9 nm thick MoS2. Multilayer MoS2 stability is better.
Having elucidated all the constituents in Ctotal quantitatively by C-V measurements, I-V characteristics are then well reproduced and understood by utilizing the drift current model. One of the physical origins for MIT is suggested to be the extrinsic outcome of the VTH shift due to Cit and CQ. Band-like transport still account for observed I-V except at extreme low temperature and subthreshold region.
Capacitance measurement is quite informative for detecting interface states and density of states in ultra-thin 2D materials, which allows us to understand device physics and improve device performance.
|
| 現在までの達成度 (区分) |
現在までの達成度 (区分)
1: 当初の計画以上に進展している
理由
The basis of capacitance measurement configuration has been done in monolayer MoS2. This is difficult and time consuming. For exmaple,several pitfalls are discussed for MoS2-FET based C-V before going to its underlying physics.
The first pitfall is parasitic capacitance effect which comes from widely used n+ Si/SiO2 substrate. Cpara1 refers to the parasitic capacitance which is charged or discharged through constant Raccess. This will induce large frequency dispersion (>Cox) in C-V and corresponding peaks in conductance-frequency (Gp/ω-f) measurement. Cpara2 refers to the parasitic capacitance which could shift the baseline of C-V curve. Quartz substrate is used in my study to totally remove these parasitic capacitance.
The second pitfall is the possible confusion of access resistance effect. Raccess is experimentally measured as residual impedance at high-frequency limit in strong accumulation region where other resistance is shunted. Measured Raccess has an order of ~10 kΩ in most of samples thanks to MoS2 natural n-doping property as well as low contact resistance with Ni. And typical measured capacitance with area is 0.3 pF, which gives the Raccess limited charging time of 3×10-9 s. So Raccess effect in our measured frequency range can be neglected . But we have to mention that Raccess can severely affect capacitance measurement at low temperature and in other device structures with more resistive 2D materials.
By knowing difficulties, we can study full view of field-effect on MoS2 from monolayer to bulk. It is important for exploring intrinsic MoS2 band transport.
|
| 今後の研究の推進方策 |
As a plan of the research, mechanically exfoliated MoS2 with thickness from 0.65 (monolayer)~118 nm is selected as channel material for top-gate FET device.
Insulating quartz substrate is used as back substrate for totally suppressing parasitic capacitance. Systematic investigation of C-V and current-voltage (I-V) measurements of the same samples are carried out. Transmission line network is applied to study channel resistance effect on C-V.
Frequency dispersion of C-V for low mobility thin 2D materials mainly results from channel charging effect. Transition from quantum capacitance (CQ) to depletion capacitance (CD) is observed from monolayer to bulk MoS2. Donor impurity concentration ND of MoS2 is extracted to be 2~3×1017 cm-3.
Having confirmed this capacitance transition in multilayer MoS2, I-V characteristics are then fully reproduced from off to on state by using the drift current model. This study demonstrates that other than SB-FET model at contact region, channel carrier density determined “body current flow” is also one of the key limiting factors for commonly observed I-V curves.
Finally, based on depletion layer nature, roadmap to achieve full control of 2D channel is established. By increasing ND (NA), allowable 2D materials thickness is reduced. We suggest that fully control of channel is very challenging in recent heavily doped SnS, SnSe, PtSe2. The formation of ultra-thin high resistive layer is also suggested in these materials due to Debye length scaling, which could result in the observation of Anderson localization phenomenon.
|
