| 研究課題/領域番号 |
20F20757
|
|---|
| 研究機関 | 東京大学 |
|---|
研究代表者 |
中村 泰信 東京大学, 先端科学技術研究センター, 教授 (90524083)
|
|---|
| 研究分担者 |
CHANG CHUNG WAI SANDBO 東京大学, 先端科学技術研究センター, 外国人特別研究員
|
|---|
| 研究期間 (年度) |
2020-07-29 – 2023-03-31
|
| キーワード | E-beam lithography / air bridge / three-wave mixing / JTWPA / parametric process / low-loss waveguide |
|---|
| 研究実績の概要 |
Following the initial prototype fabricated in FY2020, we identified the key obstacles towards a working sample of Josephson traveling-wave parametric amplifier (JTWPA) as the inhomogeneity of Josephson junction fabrications, due to the use of photo-lithography and the junction fabrication method in-use (overlapping junction approach).
By studying multiple alternative schemes in junction fabrication and the shift to ebeam-lithography, we developed a more reliable process which greatly reduced the inhomogeneity in fabricating large Josephson junctions, from more than 15% to less than 5% over a chip. This is a crucial improvement towards making any working JTWPA devices.
With the new junction process, we designed and fabricated three-wave mixing (3WM) JTWPA devices based on our nonlinear co-planar lumped-elements waveguide. Over multiple measurement and fabrication cycles, we continued to improve the JTWPA design to remove spurious modes in the transmission by using a high-yield air bridge process and other design changes. We were able to observe parametric gain by applying DC current bias and a microwave pump, an approach predicted by our simulation.
We further characterized the 3WM JTWPA device by comparing its transmission to that of a reference 50 Ohm transmission line. We were able to observe a significantly lower loss transmission (< 1 dB up to 8 GHz) through our device, comparing to most existing JTWPA devices of similar electrical length.
|
| 現在までの達成度 (区分) |
現在までの達成度 (区分)
3: やや遅れている
理由
The recent 3WM JTWPA device measured in this fiscal year exhibited a gain up to 8 dB over a relatively large bandwidth (> 6 GHz), short of the expected 20 dB gain. As a result, we delayed the further characterizations of the JTWPA with qubit readouts.
Most effort in the fiscal year was dedicated to optimizing the fabrication processes, with focus on improving the homogeneity of Josephson junctions. While we maintained a relatively simple fabrication process, it required multiple attempts and design updates before we could arrive at the appropriate parameters in order to obtain sufficiently uniform circuit features and junction patterns from lithographies.
After optimizing the fabrication, we then proceeded to verify the circuit design through measurements. Achieving a flat transmission spectrum with little spurious features has been challenging. It required multiple cycles of measurements together with feedbacks to microwave simulations to understand the root of the stray features and their mitigations.
With these obstacles removed, we narrow down the discrepancies between the measured and expected gain: Unknown transmission loss of the high frequency pump signal in our 3WM JTWPA, which is out of our current measurement frequency range; inaccurate device parameters from microwave simulations and room temperature junction resistance measurement. Moreover, for predicting JTWPA gain, we identified in the WRSpice simulators that serval parameters were off from realistic situations, this could have led to the use of under-optimized device design parameters.
|
| 今後の研究の推進方策 |
In the coming fiscal year, we will focus on overcoming the obstacles described above.
Due to the uncertain high frequency transmission through the device, I will fall back to first design a 4WM JTWPA device which requires a lower pump frequency. Most of other existing JTWPAs work in 4WM, it will allow us to more easily compare the performance given a similar set of parameters. 4WM will require a longer length of device which could be difficult to achieve given the current meandered open-stub circuit design. A new design with increased density over the same chip is now under development. It will provide a matched number of cells to the existing 4WM JTWPAs, with the same chip area of our current sample, which should therefore not require any significant change in our current fabrication process.
To better understand our device and any stray inductive/capacitive elements in practice, we will extract directly from measurements the device parameters. This can be done by fitting the simulation to the transmission properties and frequency/width of the bandgap in our new 4WM JTWPA device. This will eliminate the uncertainties in parameters which we need for the gain calculation and allows us to better verify our design.
Finally, we will explore other approaches for calculating JTWPA gain, in order to have more references for our device operations. This should be first performed for the 4WM configurations, followed by extending to the originally planned 3WM scheme.
|
