2020 年度実施状況報告書

Intelligent Active Balancing of Parallel/Series-connected Power Devices

研究課題

研究課題/領域番号	20K14720
研究機関	京都先端科学大学
研究代表者	Tripathi Ravi・Nath 京都先端科学大学, ナガモリアクチュエータ研究所, 助教 (00869745)
研究期間 (年度)	2020-04-01 – 2023-03-31
キーワード	Power Devices / Parallel Connection / Active Balancing / Gate Control
研究実績の概要	The device characteristics has been studied considering the paralleling of the devices and understands the problems that is associated with paralleling. The experimental system for this study is under development to perform the real-time operation of parallel-connected devices and observe the unbalancing phenomenon during parallel operation. The active driving methodology is under development to test it with real-time operation and obtain the improved the paralleling of the power devices. To test the device operation under parallel operation at high voltage is also vital considering the application in high power system. The safety box for high voltage experiment is also under development with interlocking and high voltage discharge functionality for risk free experimental environment.
現在までの達成度 (区分)	現在までの達成度 (区分) 3: やや遅れている理由 Last year April, received the research grant for the three years. At that time, I was working as a post-doctoral researcher. Meanwhile there was corona virus emergency. In the October last year, moved to the another university as an assistant professor. In previous university, already had the basic infrastructure and experimental system to start with the research work. The entire system and infrastructure required to be build from the scratch in the new university as well as the laboratory is very new so even did not have the basic components, items and software licenses. Everything is started from the zero and it has taken time to restart with the research work.
今後の研究の推進方策	1) The completion of the basic experimental study of parallel device system. 2) Development of high-voltage experimental set-up. 3) The experimental study of parallel-device for high voltage operation and measurement circuitry. 4) The implementation of gate control for active balancing of parallel operation.