| 研究課題/領域番号 |
21H01311
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| 研究機関 | 大阪大学 |
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研究代表者 |
舟木 剛 大阪大学, 工学研究科, 教授 (20263220)
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| 研究分担者 |
カステッラッズィ アルベルト 京都先端科学大学, 工学部, 教授 (70866897)
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| 研究期間 (年度) |
2021-04-01 – 2024-03-31
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| キーワード | Reliability / multi-chip power modules / SiC power MOSFETs / electrothermal model |
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| 研究実績の概要 |
SiC power MOSFETs are enablers of disruptive progress beyond state-of-the-art in the key parameters of power electronics technology evolution: efficiency, power density and reliability. Specifically, their ability to be operated at higher switching speeds, higher switching frequencies and ambient temperatures has been shown to yield important system level benefits, even when transistors are used as a drop-in replacement of Si ones. Still, full exploitation of the superior features of wide-band-gap devices and their subsequent large volume deployment is conditional to the development of bespoke technological solutions and design options, including cooling and packaging, as well as design tools and validation methodologies.
This work developes multi-chip silicon carbide semiconductor assemblies, which meets the lifetime requirements of key electrical power conversion applications. Because of intrinsic differences with the established silicon technology, the need exists to devise SiC-bespoke design and validation methodologies. This work first assesses the state-of-the-art in electro-thermal parameters spread for both planar-gate and trench-gate type transistors; second, it develops a physical simulation model, which can be used to investigate the relation between device progressive degradation patterns and the initial parameters value spread.
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| 現在までの達成度 (区分) |
現在までの達成度 (区分)
2: おおむね順調に進展している
理由
A number of commercial devices from different manufacturers, voltage ratings, on-state resistance and gate technologies were selected and obtained as devices under test. Results are reported for the threshold voltage, Vth, and the on-state resistance, Rds,on, measurement over temperature. Characteristics spread for different type of SiC MOSFET were evaluated. Based on the results, we developed electro-thermal compact models describing all major physical effects and behavioral features, which allows for circuit simulation of multi-chip structures, also including layout and package-related parasitic elements and high switching frequency values. The develped device models is suitable for analysis of very diverse time scales, ranging from hundreds of ns up to several tens of ms.
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| 今後の研究の推進方策 |
Future work aims to provide experimental evidence of the different aging experienced by the transistors, providing quantitative relations between their progressive degradation and spread in the main electro-thermal parameters value. The aim is twofold: on the one side, produce quantitative information which can be embedded in automated of semi-automated power module design tools, enabling virtual lifetime assessment and competitive hardware development, even in presence of higher operational temperature and loss of acceleration factor with established technology validation approaches. Here, the vision-empowering tool are differential and cumulative structure-functions: a mathematical technique to represent the structural characteristics of a power module based on its thermal response.
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