1998 Fiscal Year Final Research Report Summary
A Study. on A Super-Pipelined Ultra-Parallel Processing Mechanism and Its Unified System Description
| Project/Area Number |
08458088
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
情報システム学(含情報図書館学)
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| Research Institution | Kochi University of Technology (1997-1998)
Osaka University (1996) |
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Principal Investigator |
TERADA Hiroaki Kochi University of Technology, Faculty of Engineering, Professor, 工学部, 教授 (80028985)
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| Co-Investigator(Kenkyū-buntansha) |
IWATA Makoto Kochi University of Technology, Faculty of Engineering, Associate Professor, 工学部, 助教授 (60232683)
TAKINE Tetsuya Kyoto University, Faculty of Engineering, Associate Professor, 工学部, 助教授 (00216821)
MURAKAMI Koso Osaka University, Faculty of Engineering, Professor, 工学部, 教授 (10273731)
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| Project Period (FY) |
1996 – 1998
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| Keywords | super-pipelined logic scheme / ultra-parallel processing / asynchronous pipeline / system description / diagrammatic specification / autonomous distributed processing / data-driven / multiprocessor |
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| Research Abstract |
Towards ultimate integration of complex systems on a single silicon wafer, the main objective of this project is to establish a novel system development paradigm spanning both hardware and software. It is demonstrated that data-driven principle is able to provide common basis for integral design of systems on a chip covering both hardware and software implementations of a given specification. Then it is shown that the software part is most effectively executed on super-pipelined dynamic data-driven processors entirely composed of a self-timed pipeline scheme and distributed over a single chip. The results obtained in the project are summarized as following :
1. Super-pipelined ultra-parallel processing mechanism was proposed. In this mechanism, flexible interaction among pipelines can be utilized to implement both algorithmic and non-algorithmic functions such as the genetic functions in GA.Furthermore, during the project, the data-driven multimedia processor DDMP was developed as a core processor in the mechanism. The current version of the DDMP can execute tens billions of signal processing operations per second with power consumption as low as 2 W.
2. Multilateral diagrammatic specification scheme was established for natural representation of system function, behavior and data-structures. In the environment, a block diagram like graphical descriptions representing data dependencies among functional blocks are directly transformed into executable data-driven programs preserving the processing structures of target systems. Behavior and data structures which contain additional essential information for the transformation are also represented by diagrammatic forms. e.g. augmented sequence charts, data-structure diagrams, state transition diagrams and decision tables. Further, the transformation scheme was applied to multi-dimensional stream processing such as complex video signal processing and its practicability was demonstrated.
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