2013 Fiscal Year Annual Research Report
CMOSデバイスに向けたゲルマニウム基板上高誘電率絶縁膜ゲートスタック技術
| Project/Area Number |
12J09309
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| Research Institution | The University of Tokyo |
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Principal Investigator |
張 睿 東京大学, 大学院工学部研究科, 特別研究員(PD)
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| Keywords | Ge MOSFETs / High field mobility / Carrier scattering |
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| Research Abstract |
Ge channel is one of the most promising solution for CMOS devices in post-Si age. Mobility enhancement is the most critical issue limiting the application of Ge MOSFETS. Recently, although many progresses have been achieved for high mobility Ge MOSFETs, mobility degradation in high normal field region is still severe which strongly reduces the ON state current in Ge MOSFETs. The mechanism of this phenomenon is not clear yet, in spite of importance. Therefore, in our research the physical origins causing high normal field mobility degradation were systematically investigated. Through the evaluation of Hall mobility in Ge MOSFETs, it is found that large amount of surface states exist inside valence and conduction band of Ge, which results in significant decrease of mobile carrier concentration in the channel and rapid reduction of effective mobility of Ge MOSFETs.
Additionally, it is confirmed that the surface states inside conduction band of Ge can be passivated by annealing the Ge nMOSFETs in atomic deuterium ambient. Besides of surface states, it is also confirmed that the surface state roughness scattering dominates the mobility in high normal field for Ge MOSFETs, similar with the situation in Si MOSFETs. With decreasing the post oxidation temperature, the surface roughness at GeOx/Ge interfaces can be sufficiently reduced without losing the superior electrical passivation much. As a result, around 20% and 25% mobility enhancement can be realized for Ge pMOSFETs and nMOSFETs, respectively, in a high normal field region of N_s=10^<13> cm^<-2> by reducing the post oxidation temperature from 300℃ down to room temperature.
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| Strategy for Future Research Activity |
(抄録なし)
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