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2003 Fiscal Year Final Research Report Summary

Development of a high-speed image-understanding system designed directly from image data

Research Project

Project/Area Number 13450163
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field System engineering
Research InstitutionUniversity of Tsukuba

Principal Investigator

YASUNAGA Moritoshi  University of Tsukuba, Institute of Information Sciences and Electronics, Professor, 電子・情報工学系, 教授 (80272178)

Project Period (FY) 2001 – 2003
KeywordsImage-understanding / Motion Picture / Integrated Circuits / FPGA / Parzen Window / Neural Networks / Face Image
Research Abstract

The goal of this project is to realize a high-speed image-understanding system that has not been realized under the conventional technologies. In order to achieve the system, we implement the circuits designed directly from the images onto the VLSIs. And we apply this design approach to the "Parzen Window Method" and the "Probabilistic Neural Network Method". In both methods, the functions constructed using a great number of sample images are used, and the functions are directly designed from the image sample data. Because of this data-direct-implementation, the functions are calculated much faster than those used in the conventional approaches
The prototype system was established using reconfigurable LSIs (FPGAs) and following were obtained
1)Window functions in the Parzen Window Method were optimized using the GA (genetic algorithm). High recognition accuracy was obtained with the window functions in the face recognition problem
2)The proposed idea of the data-direct-implementation was efficiently applied not only to the image recognition but to the sonar-spectrum recognition
3)The image-understanding system based on the "Probabilistic Neural Network Method" was developed and is connected with a PC. 'The system was effectively and precisely evaluated using the PC. The PC was also used to apply the principal component analysis to the outputs from the system in order to improve the recognition accuracy

  • Research Products

    (20 results)

All Other

All Publications (20 results)

  • [Publications] 安永守利, 高見知親, 吉原郁夫: "FPGAを用いたナノ秒オーダ画像認識ハードウェア"電子情報通信学会論文誌. Vol.J84-D-2,No.10. 2280-2292 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Moritoshi Yasunaga, Ikuo Yoshihara, Jung H.Kim: "The Evolutionary Algorithm-based Reasoning System"IEICE Transaction on Information and Systems. Vol.E84-D, No.11. 1508-1520 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Moritoshi Yasunaga, Taro Nakamura, Ikuo Yoshihara, Jung H.Kim: "The Kernel-based Pattern Recognition System Designed by Genetic Algorithms"IEICE Transaction on Information and Systems. Vol.E84-D, No.11. 1528-1539 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriyuki Aibe, Moritoshi Yasunaga, Ikuo Yoshihara: "Probabilistic Neural Network Processor for Image Recognition Using Reconfigurable LSIs"Proc.2001 Int'l Symposium on Nonlinear Theory and Its Application. Vol.1. 111-114 (2001)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 相部 範之, 安永 守利, 吉原 郁夫: "確率的ニューラルネットワークを用いた高速画像認識システムの開発"電子情報通信学会第17回機能集積情報システム研究会技術報告. FIIS02,No.95. 1-8 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 相部範之, 安永守利: "確率的ニューラルネットワーク計算の並列高速化アーキテクチャとその画像認識システムへの適用"情報処理学会論文誌. Vol.43,No.SIG6(HPS5). 206-218 (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Noriyuki Aibe, Moritoshi Yasunaga, Ikuo Yoshihara, Jung, H.Kim: "A Probabilistic Neural Network Hardware System Using A Learning-Parameter Parallel Architecture"Proc.IEEE Int'l Joint Conf.on Neural Networks 2002. CD-ROM. (2002)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 安永守利, 吉原郁夫: "パターン認識用進化型ハードウェアシステムの開発-ソナースペクトル信号認識を対象として-"電子情報通信学会論文誌. Vol.J86-D-1,No.1. 1-13 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] N.Aibe, R.Mizuno, M.Nakamura, M.Yasunaga, I.Yoshihara: "Performance Evaluation System for Probabilistic Neural Network Hardware"Proc.Int'l.Symposium on Artificial Life and Robotics 2003. 471-474 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 安永守利, 相部範之, 吉原郁夫: "FPGAを用いて画像データを直接回路化した画像認識処理-ナノ秒オーダ認識処理の実現-"Proc.第10回FPGA/PLD Design Conference, Electronic Design and Solution Fair 2003. 123-130 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Moritoshi Yasunaga, Ikuo Yoshihara, Jung, H.Kim: "The Design of Segmental-Transmission-Line for High-Speed Digital Signals Using Genetic Algorithms"Proc.IEEE Congress on Evolutionary Computation (CEC) 2003. Vol.3. 1748-1755 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Ryosuke Mizuno, Noriuki Aibe, Moritoshi Yasunaga, Ikuo Yoshihara: "Reconfigurable Architecture for Probabilistic Neural Network System"Proc.IEEE Int'l Conf.Field-Programmable Technology (ICFPT) 2003. 367-370 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 相部範之, 安永守利: "再構成型並列比較アーキテクチャ(RPCA)とそのIPパケット・フィルタへの適用"電子情報通信学会第1回リコンフィギャラブルシステム研究会. 243-248 (2003)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Moritoshi Yasunaga, Ikuo Yoshihara, Jung H. Kim: "The Evolutionary Algorithm-based Reasoning System"IEICE Transaction on Information and Systems. Vol.E84-D, No.11. 1508-1520 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Moritoshi Yasunaga, Taro Nakamura, Ikuo Yoshihara, Jung H.Kam: "The Kernel-based Pattern Recognition System Designed by Genetic Algorithms"IEICE Transaction on Information and Systems. Vol.E84-D, No.11. 1528-1539 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Noriyuki Aibe, Moritoshi Yasunaga, Ikuo Yoshihara: "Probabilistic Neural Network Processor for Image Recognition Using Reconfigurable LSIs"Proc.2001 Int'l Symposium on Nonlinear Theory and Its Application (NOLTA2001). Vol.1. 111-114 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Nonyuki Aibe, Moritoshi Yasunaga, Ikuo Yoshihara, Jung, H.Kim: "A Probabilistic Neural Network Hardware System Using A Learning-Parameter Parallel Architecture"Proc.IEEE Int'l Joint Conf.on Neural Networks (The 2002 IEEE World Congress on Computational Intelligence). (CD-ROM). (2002)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] N.Aibe, R.Mizuno, M.Nakamura, M.Yasunaga, I.Yoshihara: "Performance Evaluation System for Probabilistic Neural Network Hardware"Proc.Int'l.Symposium on Artificial Life and Robotics 2003. 471-474 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Ryosuke Mizuno, Noriuki Aibe, Moritoshi Yasunaga, Ikuo Yoshihara: "Reconfigurable Architecture for Probabilistic Neural Network System"Proc.IEEE Int'l Conf.Field-Programmable Technology (ICFPT) 2003. 367-370 (2003)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Moritoshi Yasunaga, Ikuo Yoshihara, Jung, H.Kim: "The Design of Segmental-Transmission-Line for High-Speed Digital Signals Using Genetic Algorithms, (English papers are listed only.)"Proc.IEEE Congress on Evolutionary Computation (CEC) 2003. Vol.3. 1748-1755 (2003)

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 2005-04-19  

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