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2004 Fiscal Year Final Research Report Summary

Reduction Techniques for Digital Substrate Noise on Mixed-Signal Integrated Circuits

Research Project

Project/Area Number 14350195
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field 情報通信工学
Research InstitutionTokyo Institute of Technology

Principal Investigator

TAKAGI Shigetaka  Tokyo Institute of Technology, Professor, 大学院・理工学研究科, 教授 (10187932)

Co-Investigator(Kenkyū-buntansha) FUJII Nobuo  Tokyo Institute of Technology, Professor, 大学院・理工学研究科, 教授 (00016601)
WADA Kazuyuki  Toyohashi University of Technology, Lecturer, 情報工学系, 講師 (00302943)
SATO Takahide  Tokyo Institute of Technology, Research Associate, 大学院・理工学研究科, 助手 (10345390)
TAKAGI Shigetaka  Tokyo Institute of Technology, Professor (10187932)
Project Period (FY) 2002 – 2004
KeywordsSystem on Chip / Digital Substrate Noise / Automatic Control / Layout
Research Abstract

Demands on high performance mixed-signal integrated circuits are increasing because of the advancing of multimedia technologies. Periodical behavior of digital circuits produces what so called digital substrate noise. This noise will deteriorate analog circuit performance and is a big problem to be solved.
A passive guard ring has been commonly used to reduce the substrate fluctuation. However, it only suppresses the noise coupled through a substrate surface and has quite small effect on noise transfered through the deep portion of a substrate. This project proposes an active shield circuit to solve digital substrate noise problem. The proposed active shield circuit will generate an inverting signal to the digital noise and cancel out it. To improve cancellation performance layout of the active shield circuit, analog circuits and digital circuits is considered, and an automatic control technique is proposed. The validity of the proposed techniques is confirmed through experiments and simulations.

  • Research Products

    (4 results)

All 2005 Other

All Journal Article (4 results)

  • [Journal Article] Active Shield Circuit for Digital Noise Suppression in Mixed-Signal Integrated Circuits2005

    • Author(s)
      N.R.Agung, S.Takagi, K.Wada
    • Journal Title

      IEICE Transaction on Fundamentals Vol.E88-A

      Pages: 438-443

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Design Optimization of Active Shield Circuits for Digital Noise Suppression Based on Average Noise Evaluation2005

    • Author(s)
      N.R.Agung, H.Suzuki, K.Wada, S.Takagi
    • Journal Title

      IEICE Transaction on Fundamentals Vol.E88-A

      Pages: 444-450

    • Description
      「研究成果報告書概要(和文)」より
  • [Journal Article] Design of Active Shield Circuit with Automatic Tuning Scheme to Compensate Process Variation2005

    • Author(s)
      N.R.Agung, S.Takagi
    • Journal Title

      IEICE Transaction on Electronics Vol.E88-C

    • Description
      「研究成果報告書概要(欧文)」より
  • [Journal Article] Design of Active Shield Circuit with Automatic Tuning Scheme to Compensate Process Variation

    • Author(s)
      N.R.Agung, S.Takagi
    • Journal Title

      IEICE Transaction on Electronics Vol.E88-C

    • Description
      「研究成果報告書概要(和文)」より

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Published: 2006-07-11  

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