2005 Fiscal Year Final Research Report Summary
Ultrasound Measurement System for Three Dimensional Dynamic Structures
Project/Area Number |
15360214
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Research Category |
Grant-in-Aid for Scientific Research (B)
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Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Measurement engineering
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Research Institution | Yamagata University |
Principal Investigator |
TAMURA Yasutaka Yamagata Univ., Faculty of Engineering, Professor, 工学部, 教授 (40171904)
|
Co-Investigator(Kenkyū-buntansha) |
YANAGIDA Hirotaka Yamagata Univ., Faculty of Engineering, Assistant, 工学部, 助手 (80323179)
YUASA Tetsuya Yamagata Univ., Faculty of Engineering, Professor, 工学部, 教授 (30240146)
AKATSUKA Tkao Yamagata Univ., Faculty of Engineering, emeritus Prof., 工学部, 名誉教授 (80091875)
KOYAMA Kiyohito Yamagata Univ., Faculty of Engineering, Professor, 工学部, 教授 (60007218)
|
Project Period (FY) |
2003 – 2005
|
Keywords | dynamical structure measurement / three dimensional imaging / ultrasound / two dimensional array transducer / synthetic aperture Focusing / parallel computing system |
Research Abstract |
Dynamic ultrasound three-dimensional (3D) imaging using coded transmission is developed. An array of PZT 40x40 elements was fabricated with a conventional dice-and-fill process. The array size was 40 mm x 40 mm. Since the size of each element is relatively large (1 mm x 1 mm), the center frequency was selected to be 2 MHz in order to expand the ultrasonic beam. The averaged fractional bandwidth was 59.1%, and the sensitivity variance was approximately 10 dB. We confirmed the feasibility of forming a sequence of 3D images for every transmission. We also confirmed the motion estimation and compensation using a breathing balloon target. The size of the balloon is about 10 〜 20 mm across. The cycle of breathing is 8 rpm. The speed of computation is one of the most important subjects for practical applications. We constructed a PC-cluster system for high-speed computation. The image reconstruction software was installed into the PC-cluster system. An alternative solution to the high-speed computation is a dedicated hardware for image reconstruction. We have designed a high-speed image reconstruction hardware using FPGAs. The image reconstruction algorithm for the hardware consists of matched filters matched for the reference echo waveforms return from view directions. The echo waveforms for the reference are calculated in advance, and are stored in the memory as the coefficients of the filters. The matched filter operation is repeated for each transmitting cycle. For single transmission and reception, the calculation time of the first algorithm is short compared with the second algorithm, because of the less numbers of multiplies and additions. The algorithm was implemented in a personal computer using the C language in order to evaluate calculation times and the image qualities. Implementation of the algorithm by FPGA are also examined.
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Research Products
(12 results)