Improvement of LSIs' yield by Adaptive Supply Voltage Optimization

2017 Fiscal Year Final Research Report

• Project/Area Number: 15K06042
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Osaka Institute of Technology
• Principal Investigator: Makino Hiroshi 大阪工業大学, 情報科学部, 教授 (50454038)
• Project Period (FY): 2015-04-01 – 2018-03-31
• Keywords: ばらつき / しきい値電圧 / ゲート酸化膜厚 / 適応的電圧制御 / 論理回路 / 集積回路 / プロセッサ

Outline of Final Research Achievements

In order to improve the operating yield of LSIs under the situation of increasing fluctuation of transistor characteristics, we proposed the following two methods; first, an on-chip measuring method of the threshold voltage (Vth) and the gate-oxide thickness (Tox) from the frequencies of ring oscillators using only digital processing, second, an adaptively optimizing method of the supply voltage according to the measured Vth and Tox. We applied the proposed methods to an ordinary LSI including the SRAM and confirmed the effect of them by the simulation. The simulation results shows that the LSI is secured by the optimization of the supply voltage. The results of this study is promising because they realizes the improvement of LSI yield with a low cost, since all the processes from the measurement of the Vth and Tox to the adaptive optimization of the supply voltage are carried out by an on-chip processing.

Free Research Field

LSI設計