Research on low power neural network architecture using memristor technology for embedded systems

2019 Fiscal Year Final Research Report

• Project/Area Number: 17K06405
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Tokushima Bunri University
• Principal Investigator: KAWAI Hiroyuki 徳島文理大学, 理工学部, 教授 (20643159)
• Co-Investigator(Kenkyū-buntansha): 有本 和民 岡山県立大学, 情報工学部, 教授 (10501223)
• Project Period (FY): 2017-04-01 – 2020-03-31
• Keywords: ニューラルネットワーク / ノーマリーオフコンピューティング / 学習

Outline of Final Research Achievements

We studied technologies for establishing a hardware platform of embedded neural networks with low-power consumption. In this research, the neural network is characterized by use of a non-volatile memory device that holds information as resistance values. We proposed a low-power neural network architecture using the non-volatile memory, and a learning scheme and a power reduction technique suitable for it. The proposed technologies were applied to a sample application. The results of this evaluation show that 53% of fully-connected neural network nodes was reduced.Also, 65.1 % of the weight parameters in the network were replaced into zero. Therefore, the proposed technologies is useful for the reduction of both size and the power consumption of the embedded neural network.

Free Research Field

電気電子工学

Academic Significance and Societal Importance of the Research Achievements

本研究の成果は、身近な製品システムに搭載可能な小型・低電力なニューラルネットワークを実装可能とする基盤技術である。今回提案した技術を用いることで、消費電力およびコストへの要求が厳しい製品システムにも、ニューラルネットワークを実装可能としうるものである。これにより、センサ情報を用いてユーザーの使用状況を学びとり、個々のユーザーに適した機能を提供しうる製品システムの開発に寄与することが期待できる。