Research of Reconfigurable Processor for Large-scale numerical computation

2008 Fiscal Year Self-evaluation Report

• Project/Area Number: 18300016
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Computer system/Network
• Research Institution: Hiroshima City University
• Principal Investigator: HIRONAKA Tetsuo Hiroshima City University, 大学院・情報科学研究科, 教授 (10253486)
• Project Period (FY): 2006 – 2009
• Keywords: 計算機アーキテクチャ / リコンフィギャラブルプロセッサ / 高精度数値計算

Research Abstract

本研究課題は大規模数値計算向けリコンフィギャラブルプロセッサの研究開発を目的とする.具体的には, 大規模数値計算向けリコンフィギャラブルプロセッサの構成要素となる次の3つの研究開発が本研究課題の研究目的である
(1) 従来型の演算器より圧倒的に小面積であり, 高い演算精度を実現する整数, および, 浮動小数点用ディジットシリアル演算演算器の研究開発.
(2) 大規模数値計算向けリコンフィギャラブルプロセッサアーキテクチャの研究開発
(3) 大規模数値計算向けリコンフィギャラブルプロセッサを活用するアプリケーションの研究開発

Research Products

• [Presentation] Evaluation of Compact High-Throughput Reconfigurable Architecture Based on Bit-Serial Computation (2008)
  • Author(s): K. Tanigawa and T. Hironaka
  • Organizer: International Conference on Field-Programmable Technology
  • Place of Presentation: Taipei Taiwan
  • Year and Date: 20081207-10
• [Presentation] EXPLORING COMPACT DESIGN ON HIGH THROUGHPUT COARSE GRAINED RECONFIGURABLE ARCHITECTURES (2008)
  • Author(s): Kazuya Tanigawa, Tetsuya Zuyama, Takuro Uchida and Tetsuo Hironaka,
  • Organizer: In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL)
  • Place of Presentation: Heidelberg Germany
  • Year and Date: 20080908-10
• [Presentation] Development and Evaluation of Raytracing Acceleration Engine with Bit Serial Arithmetic Units (2008)
  • Author(s): Tomoyuki Kawamoto, Kazuya Tanigawa, Tetsuo Hironaka and Yuhki Yamabe
  • Organizer: Proceedings of the ITC-CSCC 2008
  • Place of Presentation: Yamaguchi-Pref. Japan
  • Year and Date: 20080706-09
• [Presentation] Development of Compiler which Supports High-level Programming Language for Dynamic Reconfigurable Architecture DS-HIE (2008)
  • Author(s): Yasuhiro Nishinaga, Takuro Uchida, Tetsuya Zuyama, Kazuya Tanigawa, Tetsuo Hironaka
  • Organizer: Proceedings of the ITC-CSCC 2008
  • Place of Presentation: Yamaguchi-Pref. Japan
  • Year and Date: 20080706-09
• [Presentation] Development of Heterogenous Multi-core Processor "Hy-DiSC" with Dynamic Reconfigurable Processor (2008)
  • Author(s): Takuro Uchida, Yasuhiro Nishinaga, Tetsuya Zuyama, Kazuya Tanigawa, Tetsuo Hironaka
  • Organizer: Proceedings of the ITC-CSCC 2008
  • Place of Presentation: Yamaguchi-Pref. Japan
  • Year and Date: 20080706-09
• [Remarks] 内田琢郎, 西永康弘, 頭山哲也, 谷川一哉, 弘中哲夫,"再構成型プロセッサを含んだ非対称型マルチプロセッサHy-DiSC",第10回IPアワード(東芝MeP賞)受賞,2008 4月24日,品川 日本.