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1990 Fiscal Year Final Research Report Summary

Research on Hardware Design of a Language Processing System Interactive Pogramming

Research Project

Project/Area Number 63460223
Research Category

Grant-in-Aid for General Scientific Research (B)

Allocation TypeSingle-year Grants
Research Field Informatics
Research InstitutionUniversity of Tsukuba

Principal Investigator

ITANO Kozo  Univ. of Tsukuba, Inst. of Infor. Sciences, Assistant Professor, 電子情報工学系, 助教授 (20114035)

Co-Investigator(Kenkyū-buntansha) NAKATA Ikuo  Univ. of Tsukuba, Inst. of Infor. Sciences, Professor, 電子情報工学系, 教授 (70133022)
WADA Koicki  Univ. of Tsukuba, Inst. of Infor. Scinces, Assistant Professor, 電子情報工学系, 助教授 (30175145)
IDA Tetsuo  Univ. of Tsukuba, Inst. of Infor. Sciences, Assistant Professor, 電子情報工学系, 助教授 (70100047)
Project Period (FY) 1988 – 1990
KeywordsVISL Design / Language System / Computer Architecture / Interpreter / Programming System
Research Abstract

In order to support high-level language programming effectively, obviously the language system must be organized as an elaborate tool set, although the exeution speed of the tool cannot be ignored. This is especially important when a low speed tool such as interpreter is used. This situation can be easily changed by the use of hardware technology which has been drastically developed for the past decade. Rather complex algorithm can be easily implemented in a single chip. This research is targeted to seek for systematic approaches to transform software based algorithms into hardwared one. When drastic efficiency should be expected, however ; usual simple minded approach is not so effective ; for example, a microprogram implementation of software algorithm may obtain 10 times performance ; however, when a hardware oriented approach is found, sometimes we obtain more than 100 times performance. In our project, a sillicon compiler is used to design a LSI chip and evaluate its perfoemance. As applications we used two language interpreters : PL/0 and Prolog, and made prototype chip designs for these. As a result, we got several valuable experiences and design measures of VLSI realization of language system, and preparation of more actual design of real chips.

  • Research Products

    (4 results)

All Other

All Publications (4 results)

  • [Publications] 〓 暁薇・板野 肯三: "構文木インタプリタPATIEのア-キテクチャ" 情報処理学会研究会 計算機ア-キテクチャ研究会. 1-8 (1989)

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] 〓 暁薇・板野 肯三: "解析木インタプリタPATIEのア-キテクチャ" 情報処理学会論文誌.

    • Description
      「研究成果報告書概要(和文)」より
  • [Publications] Xiaowei Ken and Kozo Itano,: "Architecture of a Parse-Tree Interpreter PATIE" IPSJ Computer Architecture Kenkyukai. 1-8 (1989)

    • Description
      「研究成果報告書概要(欧文)」より
  • [Publications] Xiaowei Kan and Kozo Itano,: "Architecture of a Parse-Thee Interpreter PATIEO" Transaction of IPSJ.

    • Description
      「研究成果報告書概要(欧文)」より

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Published: 1993-08-12  

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