Investigation on gate insulators for InP MIS field effect transistors with in-situ photo-CVD
| Project/Area Number |
01460135
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| Research Category |
Grant-in-Aid for General Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
電子材料工学
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| Research Institution | University of Tokyo |
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Principal Investigator |
SUGANO Takuo Engineering, Professor, 工学部, 教授 (50010707)
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| Co-Investigator(Kenkyū-buntansha) |
ARAI Fusako Engineering, Lecturer, 工学部, 講師 (10010927)
ASADA Kunihiro Engineering, Associate Professor, 工学部, 助教授 (70142239)
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| Project Period (FY) |
1989 – 1991
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| Project Status |
Completed (Fiscal Year 1991)
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| Budget Amount *help |
¥8,300,000 (Direct Cost: ¥8,300,000)
Fiscal Year 1991: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 1990: ¥2,600,000 (Direct Cost: ¥2,600,000)
Fiscal Year 1989: ¥4,900,000 (Direct Cost: ¥4,900,000)
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| Keywords | Indium phosphide / Field effect transister / Photo-CVD / Gate insulator / Stress / Surface recombination velocity / Laser Raman spectroscopy / インジウムリン / 電果効果トランジスタ / 光励起 / 絶縁物の堆積 / 窒化燐 / インジウム燐 / 化合物半導体 / 薄膜 / MIS電界効果トランジスタ / MISダイオ-ド |
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| Research Abstract |
We have succeeded to fabricate InP MIS FETs with relatively good properties by the end of the last year. This year we investigated correlations between properties of InP surface and kinds of gate insulator or process conditions of fabricating InP MIS FET in order to get much better FETs.
Laser Raman spectroscopy and photoluminescence method were used to characterize InP surface because formation of electrodes are not necessary in these methods.
Stress in semiconductors can be estimated based on extra shift of a phonon frequency which is measured clear that InP with SiO_2 or Si_3N_4 film has tensile stress in the order of 10^9 dyn/cm^2 while InP with PN film deposited by photo-CVD has negligible stress.
Surface recombination velocity can be estimated from the analysis of LO phononplasmon coupled mode which is measured by Raman spectroscopy. Surface recombination velocity of InP with PN film deposited by photo-CVD method at a relatively low temperature such as 150ﾟC after sulfer treatment of InP surface was smaller than those of InP with SiO_2 or Si_3N_4 film by about one order. The results were supported by photoluminescence and C-V methods and will have important roles in determining optimum conditions of fabricating InP MISFETs with high quality.
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Report
(4 results)
Research Products
(16 results)
