Project/Area Number |
01850005
|
Research Category |
Grant-in-Aid for Developmental Scientific Research
|
Allocation Type | Single-year Grants |
Research Field |
Applied materials
|
Research Institution | University of TOKYO |
Principal Investigator |
SUGANO Takuo Univ. of Tokyo, Dept. Electronic Eng., Professor, 工学部, 教授 (50010707)
|
Co-Investigator(Kenkyū-buntansha) |
SAKAI Tetsusi NTT, LSI Laboratory, Division Director, LSI研究所, 微細加工技術研究部長
ARAI Fusako Univ. of Tokyo, Dept. Electronic Eng., Lecturer, 工学部, 講師 (10010927)
ASADA Kunihiro Univ. of Tokyo, Dept. Electronic Eng., Associate Professor, 工学部, 助教授 (70142239)
|
Project Period (FY) |
1989 – 1991
|
Project Status |
Completed (Fiscal Year 1991)
|
Budget Amount *help |
¥5,500,000 (Direct Cost: ¥5,500,000)
Fiscal Year 1991: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 1990: ¥1,600,000 (Direct Cost: ¥1,600,000)
Fiscal Year 1989: ¥3,000,000 (Direct Cost: ¥3,000,000)
|
Keywords | SIMOX / SOI / MOSFET / IC / High-speed device / Low-power / Silicon / Thin film / 短チャネルMOS電界効果トランジスタ / 超高速集積回路 / 短チャンネルMOS電界効果トランジスタ |
Research Abstract |
In this year, measurement of ring oscillators and frequency dividers, which have been designed and fabricated using SIMOX (Separation by IMplanted OXygen) technology during last two years, have been carried out for evaluating their electric characteristics and performance. Main features of the SOI substrates are their thinness of the buried oxide layers of 80 nm, compared to the previous ones of 500 nm. As a result of thinned buried oxide layers, it has been verified that the short channel effects have been successfully suppressed because of the shielding effect of electric flux from drain electrode by the substrate. Measurement results of the ring oscillators showed that the decrease of the delay time of scaled ring oscillators saturates at the gate length of 0.2 um and less. Thissaturation is considered to take place, as the stray capacitance between gate electrode sides and drain/source electrode becomes dominant, compared with the intrinsic gate oxide capacitance. This implies that the vertical scaling of the gate electrode is first important for the small devices with gate length less than 0.2 um. Measurement that also been carried out for four types of frequency dividers, witch showed that a new circuit out of four is best in performance. The new circuit with 0.15 um gate length operated as high as 1 GHz with power consumption of 50 uW at the supply voltage of 1 V. This is due to the low stray capacitance of witing, as well as reduction in the number of FETs used in the new divider.
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