Invention of new functional devices with trap engineering of tunnel field-effect transistors
Project/Area Number |
15H05526
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Research Category |
Grant-in-Aid for Young Scientists (A)
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Allocation Type | Single-year Grants |
Research Field |
Electron device/Electronic equipment
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Research Institution | National Institute of Advanced Industrial Science and Technology |
Principal Investigator |
Mori Takahiro 国立研究開発法人産業技術総合研究所, エレクトロニクス・製造領域, 主任研究員 (70443041)
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Project Period (FY) |
2015-04-01 – 2018-03-31
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Project Status |
Completed (Fiscal Year 2017)
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Budget Amount *help |
¥23,140,000 (Direct Cost: ¥17,800,000、Indirect Cost: ¥5,340,000)
Fiscal Year 2017: ¥6,760,000 (Direct Cost: ¥5,200,000、Indirect Cost: ¥1,560,000)
Fiscal Year 2016: ¥6,630,000 (Direct Cost: ¥5,100,000、Indirect Cost: ¥1,530,000)
Fiscal Year 2015: ¥9,750,000 (Direct Cost: ¥7,500,000、Indirect Cost: ¥2,250,000)
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Keywords | トンネルトランジスタ / 等電子トラップ / 相補型集積回路 / スピン量子ビット / 低消費電力 / 量子ビット / CMOS / 量子デバイス / 集積回路 / 集積デバイス |
Outline of Final Research Achievements |
This research aimed to develop tunnel field-effect transistors (TFET) as a basic element of LSIs and to invent new functional devices with utilizing isoelectronic trap (IET). As for the basic element of LSIs, we realized the operation of both N- and P-type TFETs and succeeded in operating the complementary ring oscillator circuit at world’s first. This achievement was presented in the most prestigious international conference in the semiconductor device field and gained a great response. As for the invention of new functional devices, we succeeded in operating the IET-assisted TFET as a spin qubit and achieved an operating temperature up to 10K. This is the world's highest operating temperature of electronic-device-type spin qubits. This achievement was presented at conferences and submitted in a journal.
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Report
(4 results)
Research Products
(17 results)
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[Journal Article] Suppression of tunneling rate fluctuations in tunnel field-effect transistors by enhancing tunneling probability2017
Author(s)
T. Mori, S. Migita, K. Fukuda, H. Asai, Y. Morita, W. Mizubayashi, Y. Liu, S. O'uchi, H. Fuketa, S. Otsuka, T. Yasuda, M. Masahara, H. Ota, and T. Matsukawa
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Journal Title
Japanese Journal of Applied Physics
Volume: 56
Issue: 4S
Pages: 04CD02-04CD02
DOI
NAID
Related Report
Peer Reviewed / Acknowledgement Compliant
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[Journal Article] Demonstrating Performance Improvement of Complementary TFET Circuits by I_ON Enhancement Based on Isoelectronic Trap Technology2016
Author(s)
T. Mori, H. Asai, J. Hattori, K. Fukuda, S. Otsuka, Y. Morita, S. O’uchi, H. Fuketa, S. Migita, W. Mizubayashi, H. Ota, and T. Matsukawa
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Journal Title
Technical Digest of International Electron Devices Meeting
Volume: 2016
Pages: 512-515
DOI
Related Report
Peer Reviewed / Acknowledgement Compliant
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[Presentation] Demonstrating Performance Improvement of Complementary TFET Circuits by I_ON Enhancement Based on Isoelectronic Trap Technology2016
Author(s)
T. Mori, H. Asai, J. Hattori, K. Fukuda, S. Otsuka, Y. Morita, S. O’uchi, H. Fuketa, S. Migita, W. Mizubayashi, H. Ota, and T. Matsukawa
Organizer
International Electron Devices Meeting 2016
Place of Presentation
アメリカ合衆国・サンフランシスコ
Year and Date
2016-12-05
Related Report
Int'l Joint Research
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[Presentation] On the Variability of Tunnel Field-Effect Transistors: Suppression of BTBT Fluctuation by Tunneling Probability Enhancement2016
Author(s)
T. Mori, S. Migita, K. Fukuda, H. Asai, Y. Morita, W. Mizubayashi, Y. Liu, S. O'uchi, H. Fuketa, S. Otsuka, T. Yasuda, M. Masahara, H. Ota, and T. Matsukawa
Organizer
International Conference on Solid State Devices and Materials 2016
Place of Presentation
茨城県・つくば市
Year and Date
2016-09-26
Related Report
Int'l Joint Research
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