| Budget Amount *help |
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2017: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2016: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2015: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
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| Outline of Final Research Achievements |
In this study, we have studied on the optimization method of stochastic TDC/ADC which are used for on-chip sampler circuits of on-chip testing.
We have proposed automatic generation system of the stochastic ADC. The system can generate a stochastic ADC considering circuit parameter dependence to the circuit performance. Since the automatic generation system is based on typical digital circuit design flow, it can be easily used in different CMOS processes.
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