| Budget Amount *help |
¥17,940,000 (Direct Cost: ¥13,800,000、Indirect Cost: ¥4,140,000)
Fiscal Year 2018: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
Fiscal Year 2017: ¥6,110,000 (Direct Cost: ¥4,700,000、Indirect Cost: ¥1,410,000)
Fiscal Year 2016: ¥10,010,000 (Direct Cost: ¥7,700,000、Indirect Cost: ¥2,310,000)
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| Outline of Final Research Achievements |
We expect that the method to use high-spec FPGA for high-speed data transfers will become standard because data from detectors increase in future large-size particle physics experiments. In this research we designed and developed a test board of read-out electronics using a Intel Arria10 FPGA with different high-speed network devices. This board is unique since it has QSFP+, SFP+ and also Avago MicroPOD which has 12-links of 10Gbps or faster per link. We confirmed that we can transmit data with 12.5Gbps, 2-pairs, that is 24-links. We have also tested a software-based processors on FPGA.
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