Low-Power High-Speed Table Lookup Processing in Routers
| Project/Area Number |
16H06798
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| Research Category |
Grant-in-Aid for Research Activity Start-up
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| Allocation Type | Single-year Grants |
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| Research Field |
Communication/Network engineering
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| Research Institution | The University of Electro-Communications |
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Principal Investigator |
Yamaki Hayato 電気通信大学, 大学院情報理工学研究科, 助教 (20782197)
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| Project Period (FY) |
2016-08-26 – 2018-03-31
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| Project Status |
Completed (Fiscal Year 2017)
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| Budget Amount *help |
¥2,340,000 (Direct Cost: ¥1,800,000、Indirect Cost: ¥540,000)
Fiscal Year 2017: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2016: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
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| Keywords | ルータ / パケット処理 / 高スループット / 省電力化 / キャッシュ / パケット処理キャッシュ / パケット予測 / ルータ省電力化 / 超高速情報処理 / 省エネルギー / インターネット高度化 / 計算機システム / 情報通信工学 / ライン置換方式 / キャッシュ予測 / ネットワーク / インターネット高速化 |
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| Outline of Final Research Achievements |
This study proposed more efficient cache control mechanism for Packet Processing Cache (PPC), which enabled to process packets at high speed with significant low energy, and evaluated the hardware costs. First, we enabled to improve the cache hit rate of PPC from 70% to 80% to adopt a speculative packet processing method which stored processing results of packets into the cache in advance. In addition, we simulated and evaluated the hardware implementation of our approach and showed that our approach can be implemented with implementable hardware costs.
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Report
(3 results)
Research Products
(9 results)
