Research on Test and Diagnosis for Delay Faults by Accurate Delay Fault Simulator
| Project/Area Number |
16K00075
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Ehime University |
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Principal Investigator |
Higami Yoshinobu 愛媛大学, 理工学研究科(工学系), 教授 (40304654)
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| Co-Investigator(Kenkyū-buntansha) |
高橋 寛 愛媛大学, 理工学研究科(工学系), 教授 (80226878)
王 森レイ 愛媛大学, 理工学研究科(工学系), 講師 (90735581)
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| Project Period (FY) |
2016-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2018: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2017: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2016: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
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| Keywords | LSIのテスト / 故障診断 / 遅延故障 / LSIテスト / マルチサイクルテスト / 縮退故障 / 信号伝搬遅延変動 / テストパターン数削減 / ブリッジ故障 / 故障シミュレーション |
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| Outline of Final Research Achievements |
In this research, we have discussed the problems on test and diagnosis considering signal propagation delay in LSIs. We have developed efficient methods on three different issues as described below. First, we have developed a fault diagnosis method for bridging faults between a gate signal line and a clock signal line. The second issue is on the fault diagnosis under multi-cycle test environment with considering signal delay variation. The third issue is on test pattern reduction for field diagnosis.
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| Academic Significance and Societal Importance of the Research Achievements |
LSI（大規模集積回路）のテストや故障診断は，LSIおよびそれが組み込まれた機器の高信頼化において非常に重要な技術である．本研究では，特に，信号伝搬遅延が変動した場合にも，テストや故障診断が高精度で行えるような手法を開発した．近年の高速処理を行うLSIでは，わずかな信号伝搬遅延の変動が大きな影響を与えるため，本研究で開発した手法の学術的意義が増している．
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Report
(5 results)
Research Products
(12 results)
