Reduced-precision formats for high-performance and energy-efficient computations
Project/Area Number |
16K16062
|
Research Category |
Grant-in-Aid for Young Scientists (B)
|
Allocation Type | Multi-year Fund |
Research Field |
High performance computing
|
Research Institution | Tokyo Woman's Christian University (2017-2018) Institute of Physical and Chemical Research (2016) |
Principal Investigator |
|
Project Period (FY) |
2016-04-01 – 2019-03-31
|
Project Status |
Completed (Fiscal Year 2018)
|
Budget Amount *help |
¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
Fiscal Year 2017: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2016: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
|
Keywords | Reduced-precision / Mixed-precision / GPU / 浮動小数点演算 / 混合精度演算 / 浮動小数点 / 計算機システム / 高性能計算 / 浮動小数点表現 / 省電力計算 |
Outline of Final Research Achievements |
This study explored the possibility of reduced-precision formats which have shorter bit length against the IEEE 32/64 bit floating-point for enchance the performance of numerical computations in terms of both computation speed and energy efficiency. We proposed a light-weight implementation of reduced-precision formats on software and demonstrated the performance improvement, in terms of both speed and energy efficiency, on some data-intensive operations on basic linear algebra.
|
Academic Significance and Societal Importance of the Research Achievements |
浮動小数点表現を工夫することによる計算の高性能化は,さまざまな計算処理に応用できる汎用的なアプローチである.本研究の開始時と比べると,現在では本研究と類似のアプローチを試みた研究がいくつか見られるようになり,本研究の着想や議論には意義があったと考えられる.また,本研究期間内には達成できなかった混合精度計算手法への適用や,近年発展が著しいFPGAへの適用が今後期待される.
|
Report
(4 results)
Research Products
(7 results)