• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

Hardware-oriented Algorithms and Implementation Methodology for Object Recognition

Research Project

Project/Area Number 16K16085
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Perceptual information processing
Research InstitutionOsaka University

Principal Investigator

Yu Jaehoon  大阪大学, 情報科学研究科, 助教 (70726976)

Research Collaborator Onoye Takao  
Takeuchi Yoshinori  
Project Period (FY) 2016-04-01 – 2019-03-31
Project Status Completed (Fiscal Year 2018)
Budget Amount *help
¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2018: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2017: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2016: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Keywords物体認識 / 組込みシステム / 機械学習 / ハードウェア / 画像処理 / パターン認識 / アクセラレータ / 物体検出 / 輝度勾配ヒストグラム特徴記述子 / 集約チャンネル特徴 / ブースティング決定木 / FPGA実装 / 特徴抽出 / 物体追跡 / ACF / アルゴリズム / コンピュータビジョン / システムアーキテクチャ
Outline of Final Research Achievements

This research tackled the problems in implementing object recognition on embedded systems, which are intensive computational cost, limited hardware resources, and low processing performance. As a result, the proposed general object recognition system realized x50 faster processing performance compared with recent hardware based on the same object detection algorithm and achieved 350 fps processing performance for pedestrian detection with 1080P60 input video streams. Each core component techniques are publicized in five international conferences, and a traffic object detection system was demonstrated in A-SSCC. Also, a novel hardware-oriented feature descriptor is applied for a patent, and two papers, which are about the feature descriptor and parallel processing architecture for recognition processes, are published in IEICE Transactions.

Academic Significance and Societal Importance of the Research Achievements

本研究の学術的意義としては,既存の物体認識システムの研究がアルゴリズムを中心として行われていたのとは対照的に,システム全体のバランスを考慮したアルゴリズム,アーキテクチャ,ハードウェアの研究を行うことによって既存研究の限界を超えた電力効率と処理性能を達成している点が挙げられる.また社会的意義として,機械学習は今後運転補助システムや自動運転,ロボットなど幅広い組込み分野における利用が期待されており,本研究成果はシステムアウェアな機械学習システムの設計方法などAI化社会を支えるための要素技術を提供している点が挙げられる.

Report

(4 results)
  • 2018 Annual Research Report   Final Research Report ( PDF )
  • 2017 Research-status Report
  • 2016 Research-status Report
  • Research Products

    (8 results)

All 2018 2017 2016

All Journal Article (2 results) (of which Peer Reviewed: 2 results) Presentation (5 results) (of which Int'l Joint Research: 5 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] Decomposed Vector Histograms of Oriented Gradients for Efficient Hardware Implementation2018

    • Author(s)
      MITSUNARI Koichi、TAKEUCHI Yoshinori、IMAI Masaharu、YU Jaehoon
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E101.A Issue: 11 Pages: 1766-1775

    • DOI

      10.1587/transfun.E101.A.1766

    • NAID

      130007503081

    • ISSN
      0916-8508, 1745-1337
    • Year and Date
      2018-11-01
    • Related Report
      2018 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Hardware Architecture for High-Speed Object Detection Using Decision Tree Ensemble2018

    • Author(s)
      MITSUNARI Koichi、YU Jaehoon、ONOYE Takao、HASHIMOTO Masanori
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E101.A Issue: 9 Pages: 1298-1307

    • DOI

      10.1587/transfun.E101.A.1298

    • NAID

      130007479511

    • ISSN
      0916-8508, 1745-1337
    • Year and Date
      2018-09-01
    • Related Report
      2018 Annual Research Report
    • Peer Reviewed
  • [Presentation] Hardware Architecture for Fast General Object Detection Using Aggregated Channel Features2018

    • Author(s)
      MITSUNARI Koichi、YU Jaehoon、HASHIMOTO Masanori
    • Organizer
      IEEE Asian Solid-State Circuits Conference
    • Related Report
      2018 Annual Research Report
    • Int'l Joint Research
  • [Presentation] System Design of Vision-based Framework for Senior Driver Assistance2016

    • Author(s)
      Eric Aliwarga, Koichi Mitsunari, Jaehoon Yu, Takao Onoye, Toshitaka Azuma, and Mitsuhiko Koga
    • Organizer
      Workshop on Synthesis And System Integration of Mixed Information technologies
    • Place of Presentation
      Kyoto Research Park(京都市)
    • Year and Date
      2016-10-24
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Influence of Numerical Precision on Machine Learning and Embedded Systems2016

    • Author(s)
      Koichi Mitsunari, and Jaehoon Yu
    • Organizer
      International Workshop on Smart Info-Media Systems in Asia
    • Place of Presentation
      Classic Kameo Hotel & Serviced Apartments, Ayutthaya, Thailand
    • Year and Date
      2016-09-14
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Object Tracking based on Path Similarity of Boosted Decision Trees Inproceedings2016

    • Author(s)
      Koichi Mitsunari, Jaehoon Yu, Yoshinori Takeuchi, and Masaharu Imai
    • Organizer
      International Technical Conference on Circuits/Systems, Computers and Communications
    • Place of Presentation
      Okinawa Pref. Municipal Center(沖縄県那覇市)
    • Year and Date
      2016-07-10
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Vision-based Comprehensive Framework for Senior Driver Assistance2016

    • Author(s)
      Mitsuhiko Koga, Takao Onoye, Jaehoon Yu, Toshitaka Azuma, and Eric Aliwarga
    • Organizer
      European Congress and Exhibition on Intelligent Transport Systems and Services
    • Place of Presentation
      Glasgow, Scotland
    • Year and Date
      2016-06-06
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Patent(Industrial Property Rights)] 勾配方向ヒストグラム生成装置及び勾配方向ヒストグラム生成方法2017

    • Inventor(s)
      劉載勲,光成浩一,武内良典,今井正治
    • Industrial Property Rights Holder
      劉載勲,光成浩一,武内良典,今井正治
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2017-127405
    • Filing Date
      2017
    • Related Report
      2017 Research-status Report

URL: 

Published: 2016-04-21   Modified: 2020-03-30  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi