Budget Amount *help |
¥18,980,000 (Direct Cost: ¥14,600,000、Indirect Cost: ¥4,380,000)
Fiscal Year 2019: ¥2,730,000 (Direct Cost: ¥2,100,000、Indirect Cost: ¥630,000)
Fiscal Year 2018: ¥7,800,000 (Direct Cost: ¥6,000,000、Indirect Cost: ¥1,800,000)
Fiscal Year 2017: ¥8,450,000 (Direct Cost: ¥6,500,000、Indirect Cost: ¥1,950,000)
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Outline of Final Research Achievements |
This project has proposed a colony-based architecture and studied its efficient implementation on FPGAs, which actively utilizes the function of reconfiguration to adapt to target applications. It brings the ease of hardware and software development, accelerated computing speed, excellent power performance, and flexibility for computing systems. First of all, the colony-based architecture adapts a many-core architecture following a SIMD manner in the proposition of this research project. Thus, some processing elements and their inter-network were evaluated in this project. Then, some instruction-set architectures were verified for accelerating target applications and prepared for reconfiguration as building blocks from the viewpoint of computing speed and power performance. Also, common and popular ISAs like RISC-V were evaluated on the proposed architecture. Both the proposed and traditional ISAs could achieve adequate performance compared to conventional processors.
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