Highly parallel computing with many corallum mimic architecture
| Project/Area Number |
17H01707
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | University of Tsukuba |
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Principal Investigator |
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| Project Period (FY) |
2017-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥18,980,000 (Direct Cost: ¥14,600,000、Indirect Cost: ¥4,380,000)
Fiscal Year 2019: ¥2,730,000 (Direct Cost: ¥2,100,000、Indirect Cost: ¥630,000)
Fiscal Year 2018: ¥7,800,000 (Direct Cost: ¥6,000,000、Indirect Cost: ¥1,800,000)
Fiscal Year 2017: ¥8,450,000 (Direct Cost: ¥6,500,000、Indirect Cost: ¥1,950,000)
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| Keywords | FPGA / SIMD / メニーコア / マルチFPGA / 情報基盤 / 密結合アーキテクチャ / 高速計算 / 計算機システム / ディペンダブル・コンピューティング / ハイパフォーマンス・コンピューティング / リコンフィギャラブルシステム / リコンフィギャラブルアーキテクチャ |
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| Outline of Final Research Achievements |
This project has proposed a colony-based architecture and studied its efficient implementation on FPGAs, which actively utilizes the function of reconfiguration to adapt to target applications. It brings the ease of hardware and software development, accelerated computing speed, excellent power performance, and flexibility for computing systems. First of all, the colony-based architecture adapts a many-core architecture following a SIMD manner in the proposition of this research project. Thus, some processing elements and their inter-network were evaluated in this project. Then, some instruction-set architectures were verified for accelerating target applications and prepared for reconfiguration as building blocks from the viewpoint of computing speed and power performance. Also, common and popular ISAs like RISC-V were evaluated on the proposed architecture. Both the proposed and traditional ISAs could achieve adequate performance compared to conventional processors.
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| Academic Significance and Societal Importance of the Research Achievements |
半導体集積度の向上に期待したプロセッサの性能向上，特にプロセッサコア数の増加による性能向上，は難しいものとなりつつある．一方，ビッグデータや機械学習など扱うデータ量は指数関数的に増大している．そこで，プロセッサコア数およびプロセッサ数を増やすことで得られる従来の高速化の方向に加え，そこで利用される複数の演算コアを動的かつ柔軟に変更する提案を導入することで，飛躍的な性能向上を期待できる可能であることを示した．
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Report
(4 results)
Research Products
(29 results)
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[Book] Principles and Structures of FPGAs2018
Author(s)
Hideharu Amano, Toshinori Sueyoshi, Masahiro Iida, Motoki Amagasaki, Yuichiro Shibata, Tomonori Izumi, Yukio Mitsuyama, Kentaro Sano, Hiroki Nakahara, Tsutomu Maruyama, Yoshiki Yamaguchi, Yasunori Osana, Masato Motomura, Masanori Hariyama, Minoru Watanabe,
Total Pages
231
Publisher
Springer, Singapore
ISBN
9789811308246
Related Report
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