| Budget Amount *help |
¥206,570,000 (Direct Cost: ¥158,900,000、Indirect Cost: ¥47,670,000)
Fiscal Year 2021: ¥33,540,000 (Direct Cost: ¥25,800,000、Indirect Cost: ¥7,740,000)
Fiscal Year 2020: ¥32,240,000 (Direct Cost: ¥24,800,000、Indirect Cost: ¥7,440,000)
Fiscal Year 2019: ¥34,710,000 (Direct Cost: ¥26,700,000、Indirect Cost: ¥8,010,000)
Fiscal Year 2018: ¥39,910,000 (Direct Cost: ¥30,700,000、Indirect Cost: ¥9,210,000)
Fiscal Year 2017: ¥66,170,000 (Direct Cost: ¥50,900,000、Indirect Cost: ¥15,270,000)
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| Outline of Final Research Achievements |
High-quality III-V-OI and GOI structures were formed on Si substrates using smart cut, epitaxial lift-off, and oxidation concentration methods, and ultra-thin III-V-OI nMOSFETs and GOI nMOSFETs/pMOSFETs with the thickness of 10 nm or less were realized by digital etching. The world's highest mobility was achieved by optimizing strain, surface orientation, and so on. We also proposed a low-resistance metal source-drain formation and its evaluation method, MOS interface control technologies to realize low interface defect densities. As a result, we established fundamental technologies for fabricating III-V/Ge 3-D stacked CMOS on Si substrates.
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