Design-less system of Analog integrated circuits by learning skills of expert engineers
| Project/Area Number |
17K00073
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Gunma University |
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Principal Investigator |
Takai Nobukazu 群馬大学, 大学院理工学府, 准教授 (70318905)
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| Project Period (FY) |
2017-04-01 – 2020-03-31
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| Project Status |
Completed (Fiscal Year 2019)
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| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2019: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2018: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2017: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
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| Keywords | 演算増幅器 / コンパレータ / Q学習 / ニューラルネットワーク / 自動設計 / アナログ集積回路設計 / 深層学習 / コンパレータ回路 / 機械学習 / アナログ集積回路 / ンパレータ回路 |
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| Outline of Final Research Achievements |
Our research focuses on the automatic design of analog integrated circuits, which are an important element of the Society 5.0, by computer.
In order to learn the intuition of skilled circuit designers, a method using neural networks has been proposed. The system learns an operational amplifier, one of the basic circuits of analog integrated circuits, and can instantly design a circuit that satisfies 13 specifications. This is the world's first method that can automatically design circuits that meet as many as 13 different specifications simultaneously, and we have applied for a domestic patent.
We also have proposed a method that enables the computer to design circuits autonomously by combining it with Q-learning, and confirmed that the performance was improved by up to four times. This method is also the first of its kind in the world, and a domestic patent has been applied for.
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| Academic Significance and Societal Importance of the Research Achievements |
アナログ集積回路の自動設計には多くの手法が存在するが、いずれも単純な回路構造に限定されており、アナログ集積回路の自動設計の実現の難しさを示している。多くの仕様を同時に満たす回路の自動設計の実現は世界初となり、学術的意義は大きい。
アナログ集積回路の設計レス環境の実現により、電子機器の市場への早期投入や高騰している設計・製造コストの削減など、産業界への波及効果が期待できる。さらに、電子機器設計を容易にし、多種多様な非半導体設計スペシャリストがアイデアで勝負する時代への変革のきっかけとなる。この変革により集積回路設計の裾野が広がり、様々な電子機器の設計が可能となる。
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Report
(4 results)
Research Products
(34 results)
