• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

A study on low delay network topology for a large scale parallel computing system

Research Project

Project/Area Number 17K00082
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionKumamoto University

Principal Investigator

IIDA Masahiro  熊本大学, 大学院先端科学研究部(工), 教授 (70363512)

Project Period (FY) 2017-04-01 – 2020-03-31
Project Status Completed (Fiscal Year 2019)
Budget Amount *help
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2019: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
Fiscal Year 2018: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2017: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Keywordsグラフ処理 / 概略計算 / FPGA / リコンフィギャラブルシステム / ASPL / Cayley Graph / Pseudo-ZDD / ODP / Graph Golf / ネットワーク / ハイパフォーマンス・コンピューティング / グラフ理論 / スモールワールド
Outline of Final Research Achievements

In this work, we developed an algorithm to connect the research results of the Degree/Diameter Program to the Order/Degree Program. It is shown that the ODP can be solved by manually applying the Cayley graph to the ODP, and the results are reported in the IEICE journal. In addition, the graph processing accelerator proposed a data structure for processing graphs in streams, which was presented at the IEICE Technical Committee on Reconfigurable Systems (RECONF). In the development of the graph processing accelerator, it became clear that the calculation of the mean shortest path length ASPL was a problem, but it was not solved. However, with this consideration, a serial approximate adder was invented and a patent was applied.

Academic Significance and Societal Importance of the Research Achievements

グラフ処理に対する新しいアプローチとして,本研究課題で実施した内容は学術的な意義が高い.また,研究過程で生まれたシリアル概略加算器は,グラフ処理のみならず様々な処理に適用できる可能性があることから,学術的,社会的意義は計り知れない.

Report

(4 results)
  • 2019 Annual Research Report   Final Research Report ( PDF )
  • 2018 Research-status Report
  • 2017 Research-status Report
  • Research Products

    (4 results)

All 2019 2018 2017

All Journal Article (2 results) (of which Peer Reviewed: 1 results) Presentation (1 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] Order Adjustment Approach Using Cayley Graphs for the Order/Degree Problem2018

    • Author(s)
      T Kitasuka, T Matsuzaki, M Iida
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E101.D Issue: 12 Pages: 2908-2915

    • DOI

      10.1587/transinf.2018PAP0008

    • NAID

      130007539328

    • ISSN
      0916-8532, 1745-1361
    • Year and Date
      2018-12-01
    • Related Report
      2018 Research-status Report
    • Peer Reviewed
  • [Journal Article] FPGAを用いたグラフストリーム処理の一検討2017

    • Author(s)
      松崎貴之,尼崎太樹,飯田全広,久我守弘,末吉敏則
    • Journal Title

      信学技報, vol. 117, no. 279, RECONF2017-38, pp. 7-12, 2017年11月.

      Volume: 117 Pages: 7-12

    • Related Report
      2017 Research-status Report
  • [Presentation] FPGAを用いたグラフストリーム処理の一検討2017

    • Author(s)
      松崎貴之
    • Organizer
      デザインガイア2017 -VLSI設計の新しい大地-
    • Related Report
      2017 Research-status Report
  • [Patent(Industrial Property Rights)] 演算装置、及び演算方法2019

    • Inventor(s)
      飯田全広, 尼崎太樹, 古賀大顕
    • Industrial Property Rights Holder
      飯田全広, 尼崎太樹, 古賀大顕
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2019-211774
    • Filing Date
      2019
    • Related Report
      2019 Annual Research Report

URL: 

Published: 2017-04-28   Modified: 2021-02-19  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi