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Development of Intra/Inter-Cluster networks in FPGA Clusters

Research Project

Project/Area Number 17K00087
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionShonan Institute of Technology

Principal Investigator

Miura Yasuyuki  湘南工科大学, 情報学部, 教授 (40440292)

Project Period (FY) 2017-04-01 – 2023-03-31
Project Status Completed (Fiscal Year 2022)
Budget Amount *help
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2019: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
Fiscal Year 2018: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2017: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Keywordsコンピュータアーキテクチャ / FPGA / 並列処理 / 相互結合ネットワーク / システムオンチップ / ハイパフォーマンスコンピューティング / ネットワークオンチップ / ネットワーク / ハイパフォーマンス・コンピューティング
Outline of Final Research Achievements

The purpose of this research is to construct a framework for general-purpose intra/inter-cluster communication in FPGA clusters. In this research, using the framework of the Altera FPGA development environment, we have constructed components that realize various inter-module communication functions including board-to-board communication, such as memory modules and external memory in the FPGA using the packet-switched method.
In our research, "realization of one-to-one inter-module communication function using Avalon-Streaming interface" and "prototype and experiment of a system in which multiple softcore processors operate simultaneously" were realized, and a router circuit that serves as a many-to-many communication interface on multiple boards was realized.

Academic Significance and Societal Importance of the Research Achievements

これまで、FPGA間の通信は開発者が定義し、個別に開発を行うのは一般的であった。本研究計画では、従来のQsysの枠組みを利用しつつ、Avalon-Streaming interfaceの活用により、パケット通信の手法を取り入れることによって、FPGAボード間にまたがるメモリアクセスを抽象化するフレームワークを提供する。本研究計画の成果により、ユーザーロジックを開発する各ユーザーは、ボードの内部と外部を意識することなく、統一的なメモリ空間により、メモリ、PCIインターフェイスなどのアクセスが可能となり、FPGAクラスタのためのユーザーロジックの開発期間が大幅に短縮される。

Report

(7 results)
  • 2022 Annual Research Report   Final Research Report ( PDF )
  • 2021 Research-status Report
  • 2020 Research-status Report
  • 2019 Research-status Report
  • 2018 Research-status Report
  • 2017 Research-status Report
  • Research Products

    (19 results)

All 2021 2020 2019 2018 2017

All Journal Article (6 results) (of which Int'l Joint Research: 2 results,  Peer Reviewed: 5 results,  Open Access: 4 results) Presentation (13 results) (of which Int'l Joint Research: 5 results)

  • [Journal Article] The Architecture on Communication Circuit of FPGA Cluster by Qsys Interconnect2021

    • Author(s)
      三浦 康之、深瀬 尚久、中尾 司ピエール
    • Journal Title

      電子情報通信学会論文誌D 情報・システム

      Volume: J104-D Issue: 7 Pages: 562-573

    • DOI

      10.14923/transinfj.2020FIP0006

    • ISSN
      1880-4535, 1881-0225
    • Year and Date
      2021-07-01
    • Related Report
      2021 Research-status Report
  • [Journal Article] Qsysインターコネクトを用いた FPGAクラスタ向けネットワーク回路の構築2021

    • Author(s)
      三浦 康之, 深瀬 尚久, 中尾 司ピエール
    • Journal Title

      電子情報通信学会論文誌

      Volume: 7

    • Related Report
      2020 Research-status Report
    • Peer Reviewed / Open Access
  • [Journal Article] The Study on Adaptive Routing Algorithm of 2-D Torus Network with Fault Tolerance2019

    • Author(s)
      中尾司ピエール,三浦康之,深瀬尚久
    • Journal Title

      IEEJ Transactions on Electronics, Information and Systems

      Volume: 139 Issue: 4 Pages: 492-503

    • DOI

      10.1541/ieejeiss.139.492

    • NAID

      130007622082

    • ISSN
      0385-4221, 1348-8155
    • Year and Date
      2019-04-01
    • Related Report
      2019 Research-status Report 2018 Research-status Report
    • Peer Reviewed / Open Access
  • [Journal Article] SCCN: A Time-Effective Hierarchical Interconnection Networkfor Network-On-Chip2019

    • Author(s)
      Mohammed N. M. Ali, M. M. Hafizur Rahman, Rizal Mohd Nor, Dhiren K. Behera, Tengku Mohd Tengku Sembok, Yasuyuki Miura and Yasushi Inoguchi
    • Journal Title

      Mobile Networks and Applications, Springer

      Volume: 24 Issue: 4 Pages: 1-10

    • DOI

      10.1007/s11036-019-01262-2

    • Related Report
      2019 Research-status Report
    • Peer Reviewed / Open Access / Int'l Joint Research
  • [Journal Article] Fault-tolerant adaptive routing algorithm for 2D torus network”2019

    • Author(s)
      Tsukasa-Pierre Nakao, Yasuyuki Miura, Naohisa Fukase
    • Journal Title

      TRANSACTIONS ON NETWORKS AND COMMUNICATIONS

      Volume: 1 Issue: 1 Pages: 63-83

    • DOI

      10.14738/tnc.71.6032

    • Related Report
      2018 Research-status Report
    • Peer Reviewed / Open Access
  • [Journal Article] The Performance Evaluation of a 3D Torus Network Using Partial Link-Sharing Method in NoC Router Buffer2017

    • Author(s)
      Naohisa FUKASE, Yasuyuki MIURA, Shigeyoshi WATANABE, M.M. HAFIZUR RAHMAN
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E100.D Issue: 10 Pages: 2478-2492

    • DOI

      10.1587/transinf.2017EDP7031

    • NAID

      130006110291

    • ISSN
      0916-8532, 1745-1361
    • Related Report
      2017 Research-status Report
    • Peer Reviewed / Int'l Joint Research
  • [Presentation] Virtual-Channel Implementation on Inter-Board Data Transmission,2020

    • Author(s)
      Naohisa Fukase, Akihisa Furuichi and Yasuyuki Miura,
    • Organizer
      IEEE International Conference on Consumer Electronics Taiwan (IEEE 2020 ICCE-TW)
    • Related Report
      2020 Research-status Report
    • Int'l Joint Research
  • [Presentation] Qsysインターコネクトを用いたFPGAクラスタ向けネットワークの通信回路における仮想チャネル機能の実現2020

    • Author(s)
      深瀬尚久,古市晃久,三浦康之,中尾 司ピエール
    • Organizer
      電子情報通信学会リコンフィギャラブル研究会
    • Related Report
      2019 Research-status Report
  • [Presentation] Qsysインターコネクトを用いたFPGAクラスタ向けネットワークの通信高速化に向けた検討2020

    • Author(s)
      古市 晃久,深瀬 尚久,三浦 康之
    • Organizer
      電子情報通信学会FIIS研究会
    • Related Report
      2019 Research-status Report
  • [Presentation] Qsysインターコネクトを用いたFPGAクラスタ向けネットワークの通信回路における仮想チャネル機能の実装と評価2020

    • Author(s)
      深瀬 尚久,古市 晃久,三浦 康之
    • Organizer
      電子情報通信学会FIIS研究会
    • Related Report
      2019 Research-status Report
  • [Presentation] A study on Inter-Board Data Transmission of FPGA2019

    • Author(s)
      Naohisa Fukase, Hironobu Handa, Akihisa Furuichi, Yasuyuki Miura
    • Organizer
      IEEE International Conference on Consumer Electronics Taiwan (IEEE 2019 ICCE-TW)
    • Related Report
      2019 Research-status Report
    • Int'l Joint Research
  • [Presentation] Avalon Interconnectに即したFPGA間通信網の設計法に関する研究報告2019

    • Author(s)
      三浦康之,深瀬尚久,半田寛信,古市晃久
    • Organizer
      電子情報通信学会FIIS研究会
    • Related Report
      2019 Research-status Report
  • [Presentation] Qsys Interconnectによるオンチップ/オフチップFPGA通信網に関する研究2019

    • Author(s)
      三浦康之,深瀬尚久,半田寛信,古市晃久
    • Organizer
      情報処理学会HPC研究会
    • Related Report
      2019 Research-status Report
  • [Presentation] 複数のFPGAボードを使用したFPGA間データ通信に関する検討2019

    • Author(s)
      古市晃久,三浦康之,半田寛信,深瀬尚久
    • Organizer
      第81回情報処理学会全国大会
    • Related Report
      2018 Research-status Report
  • [Presentation] The Study on Adaptive Routing Algorithm of 2-D Torus Network with Fault Tolerance2018

    • Author(s)
      Tsukasa-Pierre Nakao, Yasuyuki Miura and Naohisa Fukase
    • Organizer
      , IEEE International Conference on Consumer Electronics Taiwan (IEEE 2018 ICCE-TW)
    • Related Report
      2018 Research-status Report
    • Int'l Joint Research
  • [Presentation] Qsysコンポーネントを用いたFPGAクラスタ向けネットワークルータ回路の検討2018

    • Author(s)
      深瀬尚久,半田寛信,古市晃久,三浦康之
    • Organizer
      電子情報通信学会FIIS研究会
    • Related Report
      2018 Research-status Report
  • [Presentation] The Study on Adaptive Routing Algorithm of 2-D Torus Network with Fault Tolerance2018

    • Author(s)
      Tsukasa-Pierre. NAKAO, Yasuyuki. MIURA, Naohisa. FUKASE
    • Organizer
      IEEE International Conference on Consumer Electronics-Taiwan (IEEE 2018 ICCE-TW)
    • Related Report
      2017 Research-status Report
    • Int'l Joint Research
  • [Presentation] FPGAクラスタにおけるストリーミング・インターコネクトを用いた モジュール間通信に関する研究2018

    • Author(s)
      半田 寛信, 三浦 康之
    • Organizer
      電子情報通信学会 機能集積情報システム研究会
    • Related Report
      2017 Research-status Report
  • [Presentation] Buffer Size Evaluation of Mixture Communication of the Wormhole and Single-Flit Routing2017

    • Author(s)
      Yasuyuki Miura, Junpei Sugioka
    • Organizer
      IEEE International Conference on Consumer Electronics-Taiwan (IEEE 2017 ICCE-TW)
    • Related Report
      2017 Research-status Report
    • Int'l Joint Research

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Published: 2017-04-28   Modified: 2024-01-30  

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