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Design of a General-Synchronous Circuit for Approximate Computing using Speculative Xxecution

Research Project

Project/Area Number 17K12659
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionTokyo Institute of Technology

Principal Investigator

Shimpei Sato  東京工業大学, 工学院, 助教 (80782763)

Project Period (FY) 2017-04-01 – 2020-03-31
Project Status Completed (Fiscal Year 2019)
Budget Amount *help
¥3,900,000 (Direct Cost: ¥3,000,000、Indirect Cost: ¥900,000)
Fiscal Year 2018: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Fiscal Year 2017: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Keywords集積回路設計 / 近似演算 / Approximate Computing / 一般同期式回路 / デジタル集積回路設計 / 可変レイテンシ回路 / 回路設計 / 可変レイテンシ / 投機実行
Outline of Final Research Achievements

The end of Moore's Law is predicted, but the demand for the performance improvement of digital circuits is still high. Approximate Computing is one of the solutions for this demand. This study is a circuit design method to realize approximate computing on general-synchronous circuits using speculative execution. As an achievement of this work, a design method of speculative execution in a general-synchronous circuit is developed. A circuit designed by this method achieves 26% higher performance compared to a conventional circuit. And, it is examined that an adoption of this method to approximate computing. We reported our achievement to the international conference ISCAS and an IEICE transaction.

Academic Significance and Societal Importance of the Research Achievements

これから社会基盤となるアプリケーションの発展には集積回路の性能向上が不可欠である。これまでの集積回路の性能向上は製造プロセスの微細化による性能向上によるところが大きかった。しかし、その微細化の限界が予測されており、これからは異なるアプローチによる性能向上が必要となる。その一つが近似演算という、正確な演算を行わずに演算速度と低消費電力の達成を目指すアプローチである。例えば、AI等で用いられる演算は必ずしも正確な演算をする必要はない。アプリケーションのアルゴリズムのレベルなど様々な段階において近似演算のアプローチが試みられており、本研究では近似演算を実現する集積回路の設計手法について取り組んだ。

Report

(4 results)
  • 2019 Annual Research Report   Final Research Report ( PDF )
  • 2018 Research-status Report
  • 2017 Research-status Report
  • Research Products

    (6 results)

All 2019 2017

All Journal Article (1 results) (of which Peer Reviewed: 1 results) Presentation (5 results) (of which Int'l Joint Research: 2 results)

  • [Journal Article] A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution2019

    • Author(s)
      SATO Shimpei、SASSA Eijiro、UKON Yuta、TAKAHASHI Atsushi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E102.A Issue: 12 Pages: 1760-1769

    • DOI

      10.1587/transfun.E102.A.1760

    • NAID

      130007754049

    • ISSN
      0916-8508, 1745-1337
    • Year and Date
      2019-12-01
    • Related Report
      2019 Annual Research Report
    • Peer Reviewed
  • [Presentation] A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution2019

    • Author(s)
      Shimpei Sato, Eijiro Sassa, Yuta Ukon, and Atsushi Takahashi
    • Organizer
      2019 IEEE International Symposium on Circuits and Systems (ISCAS)
    • Related Report
      2019 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution2019

    • Author(s)
      Shimpei Sato, Eijiro Sassa, Yuta Ukon, Atsushi Takahashi
    • Organizer
      IEEE International Symposium on Circuits and Systems (ISCAS '19)
    • Related Report
      2018 Research-status Report
    • Int'l Joint Research
  • [Presentation] 一般同期性能を向上させる遅延最適化に関する検討2019

    • Author(s)
      佐々栄治郎,佐藤真平,高橋篤司
    • Organizer
      電子情報通信学会技術研究報告 VLD2018-72
    • Related Report
      2018 Research-status Report
  • [Presentation] 演算器の可変レイテンシ化による処理性能と回路面積のトレードオフに関する評価2017

    • Author(s)
      右近祐太,佐藤真平,高橋篤司
    • Organizer
      電子情報通信学会技術研究報告 VLD2017-26
    • Related Report
      2017 Research-status Report
  • [Presentation] 典型的な回路を用いた近似演算における入力系列の演算精度への影響の調査2017

    • Author(s)
      佐藤真平,右近祐太,高橋篤司
    • Organizer
      電子情報通信学会技術研究報告 VLD2016-95
    • Related Report
      2017 Research-status Report

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Published: 2017-04-28   Modified: 2021-02-19  

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