Quasi-ballistic transport modeling of emerging MOSFETs with new channel materials and new device architectures
Project/Area Number |
18560334
|
Research Category |
Grant-in-Aid for Scientific Research (C)
|
Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Electron device/Electronic equipment
|
Research Institution | Kobe University |
Principal Investigator |
TSUCHIYA Hideaki Kobe University, 大学院・工学研究科, 准教授 (80252790)
|
Project Period (FY) |
2006 – 2009
|
Project Status |
Completed (Fiscal Year 2009)
|
Budget Amount *help |
¥4,110,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥810,000)
Fiscal Year 2009: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2008: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2007: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2006: ¥600,000 (Direct Cost: ¥600,000)
|
Keywords | 電子デバイス / 集積回路 / ナノスケールMOSFET / バリスティック輸送 / 量子補正モンテカル法 / ショットキーMOSFET / 高移動度チャネルMOSFET / 電流駆動力 / ナノワイヤトランジスタ / ウィグナー関数法 / 電子デバイス・集積回路 / 量子効果 / 準バリスティック輸送 / 量子補正モンテカル / 非Si材料MOSFET / テクノロジーブースター / 新チャネル構造MOSFET / 3次元構造MOSFET / 量子補正モンテカルロ法 / 粒子分割法 / 量子閉じ込め効果 / 後方散乱 |
Research Abstract |
This project focused on the development of a quantum mechanical design tool and a device design guideline to realize ultra-high performance information technology by introducing new channel materials and new device architectures. We found that an optimum structural design of source and drain electrodes is necessary for III-V MOSFETs to outperform the conventional Si-MOSFETs. Furthermore, in Si nanowire MOSFETs with gate-all-around architecture, the source-drain tunneling effects were found to possibly limit the further downscaling below 10nm gate length.
|
Report
(6 results)
Research Products
(70 results)