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Exploring an Internet architecture to support different latenct requirements

Research Project

Project/Area Number 18K11256
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Review Section Basic Section 60060:Information network-related
Research InstitutionThe University of Tokyo

Principal Investigator

Katsushi Kobayashi  東京大学, 大学院情報理工学系研究科, 特任准教授 (90251719)

Project Period (FY) 2018-04-01 – 2022-03-31
Project Status Completed (Fiscal Year 2021)
Budget Amount *help
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2020: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
Fiscal Year 2019: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2018: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Keywordsインターネット / ルータ / ネットワーク品質 / ネットワーク遅延 / パケットスケジュラー / ネットワークアーキテクチャ / 通信方式 / 実時間
Outline of Final Research Achievements

Network latency is directly related to user experience of network applications. We have been proposed LAWIN (Latency AWare Internet) architecture, which satisfies various latency requirements from different applications.
To demonstrate the feasibility of LAWIN in backbone networks, we implemented a hardware packet scheduler using FPGA. It performed bandwidth throughputs comparable to ordinary hardware based packet schedulers. To demonstrate the replaceability from the existing Internet, we evaluated the impact of LAWIN to existing traffic with real systems. We confirmed the impact to traffic behavior is negligible.

Academic Significance and Societal Importance of the Research Achievements

本研究が目指すアプリケーションごとの遅延要求に応えるインターネットが実現すればアプリケーション体感品質の向上だけではなく、IoT (Internet of Things)では、取得したデータをもとに制御をおこなうセンサーからアクチュエータにいたる処理における実時間性の向上も期待できるなどその波及範囲は大きい。

Report

(5 results)
  • 2021 Annual Research Report   Final Research Report ( PDF )
  • 2020 Research-status Report
  • 2019 Research-status Report
  • 2018 Research-status Report
  • Research Products

    (4 results)

All 2021 2020 2018

All Journal Article (4 results) (of which Peer Reviewed: 1 results)

  • [Journal Article] メモリ帯域を考慮した破棄付きEarliest Deadline First パケットスケジューラの設計2021

    • Author(s)
      小林克志
    • Journal Title

      電子通信情報学会技術報告

      Volume: 121 Pages: 50-55

    • Related Report
      2021 Annual Research Report
  • [Journal Article] A DRAM-friendly priority queue Internet packet scheduler implementation and its effects on TCP.2020

    • Author(s)
      Katsushi Kobayashi
    • Journal Title

      In Proc. IFIP Networking Conference (Networking)

      Volume: 1 Pages: 713-718

    • Related Report
      2020 Research-status Report
    • Peer Reviewed
  • [Journal Article] HBM をバッファとするパケットスケジューラの FPGA 設計と実装2020

    • Author(s)
      小林克志
    • Journal Title

      電子情報通信学会技術研究報告

      Volume: 119 Pages: 87-92

    • Related Report
      2019 Research-status Report
  • [Journal Article] クラウドFPGAサービスを利用したEDFパケットスケジューラ実装の評価2018

    • Author(s)
      小林克志
    • Journal Title

      電子情報通信学会技術研究報告

      Volume: IEICE-118 Pages: 51-58

    • Related Report
      2018 Research-status Report

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Published: 2018-04-23   Modified: 2023-01-30  

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