Research on vertical InP-related hot electron transistors with insulated gate
| Project/Area Number |
19206038
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
MIYAMOTO Yasuyuki Tokyo Institute of Technology, 大学院・理工学研究科, 准教授 (40209953)
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| Project Period (FY) |
2007 – 2009
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| Project Status |
Completed (Fiscal Year 2009)
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| Budget Amount *help |
¥40,950,000 (Direct Cost: ¥31,500,000、Indirect Cost: ¥9,450,000)
Fiscal Year 2009: ¥7,800,000 (Direct Cost: ¥6,000,000、Indirect Cost: ¥1,800,000)
Fiscal Year 2008: ¥9,750,000 (Direct Cost: ¥7,500,000、Indirect Cost: ¥2,250,000)
Fiscal Year 2007: ¥23,400,000 (Direct Cost: ¥18,000,000、Indirect Cost: ¥5,400,000)
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| Keywords | ホットエレクトロン / 電子ランチャー / InP / InGaAs / 電子ビーム露光 / III-V MOS / バリスティック電子 / モンテカルロシミュレーション / 縦型電子デバイス / ヘテロランチャー / 絶縁ゲート |
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| Research Abstract |
High current density (6MA/cm^2) that was important for high speed operation was achieved by using a 15-nm-wide source that was narrowest in compound semiconductor vertical transistors. Moreover, the current drivability without dependence of channel length was confirmed and suggested that electron transportation in the channel was ballistic. High-k dielectric for high drivability and regrown source for extension of the scheme in lateral device were also studied.
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Report
(4 results)
Research Products
(74 results)
