Designing of Ultra High-Speed and Compact Variable Latency PipelinedArithmetic Units

• Project/Area Number: 19700037
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Single-year Grants
• Research Field: Computer system/Network
• Research Institution: Tohoku University
• Principal Investigator: EGAWA Ryusuke Tohoku University, サイバーサイエンスセンター, 助教 (80374990)
• Project Period (FY): 2007 – 2009
• Project Status: Completed (Fiscal Year 2009)
• Budget Amount: ¥3,650,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥450,000); Fiscal Year 2009: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000); Fiscal Year 2008: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000); Fiscal Year 2007: ¥1,700,000 (Direct Cost: ¥1,700,000)
• Keywords: ウェーブパイプライン / VLSI / 回路設計 / 熱解析 / 等遅延回路 / 低消費電力 / 可変レイテン / 算術演算 / 可変レイテンシ

Research Abstract

To realize low-power and high-speed arithmetic units with future CMOS technologies, this project focused on and carried out research that concerned with a circuit compaction technique and a delay balancing technique. An input bit-sliced circuit partitioning method for circuit scale compaction and a delay balancing methods based on logical effort theory for wave pipelines have been proposed and evaluated. The experimental results clarified the effective of both proposals.

Research Products

• [Journal Article] Evaluation of Fine Grain 3-D Integrated Arithmetic Units (2009)
  • Author(s): Ryusuke Egawa, Jubee Tada, Hiroaki Kobayashi, Gensuke Goto
  • Journal Title: Proceedings of IEEE 3D System Integration Conference 2009 (CD-ROM)
  • Peer Reviewed
• [Journal Article] Gain Based Delay Balancing in the Deep Submicron Era (2008)
  • Author(s): Ryusuke EGAWA, Jubee TADA, Hiroaki Kobayashi and Gensuke GOTO
  • Journal Title: Proceedings of The 23nd International Technical Conference on Circuits/Systems, (ITC-CSCC 2008) Pages: 577-580
  • Peer Reviewed
• [Journal Article] Power-Aware Dynamic Cache Partitioning for CMPs (2008)
  • Author(s): Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi
  • Journal Title: Transactions on High-Performance Embedd ed Architectures and Compilers(Transactions on HiPEAC) vol.3, no.1 Pages: 149-167
  • Peer Reviewed
• [Journal Article] ウェイアロケーション型共有キャッシュ機構のハードウェア設計に関する研究 (2008)
  • Author(s): 阿部健太, 小寺功, 江川隆輔, 滝沢寛之, 小林広明
  • Journal Title: 第7回情報科学技術フォーラム(FIT2008)予稿集 Pages: 35-38
  • Peer Reviewed
• [Journal Article] ウェーブパイプラインのための遅延調整手法に関する研究 (2008)
  • Author(s): 佐野啓一郎, 多田十兵衛, 江川隆輔, 後藤源助
  • Journal Title: 信学技法 集積回路 ICD2007-179 Pages: 1-6
  • NAID: 110006885207
• [Journal Article] Scaling Effects in Combinational Logic Circuit Design (2007)
  • Author(s): Ryusuke Egawa, Tasku Ito, Tomoyuki Inoue, Jubei Tada, Ken-ichi Suzuki, Tadao Nakamura
  • Journal Title: Journal of Information Vol.10,No.5 Pages: 695-702
  • Peer Reviewed
• [Journal Article] Scaling Effects in Combinational Logic Circuit Design (2007)
  • Author(s): Ryusuke Egawa, Tasku Ito, Tomoyuki Inoue, Jubei Tada, Ken-ichi Suzuki and Tadao Nakamura
  • Journal Title: Journal of Information Vol.10, No.5 Pages: 695-702
  • Peer Reviewed
• [Journal Article] Gain-based Delay Balancing Technique for Wave Pipelining (2007)
  • Author(s): Ryusuke Egawa, Tasku Ito, Tomoyuki Inoue, Jubei Tada, Ken-ichi Suzuki and Tadao Nakamura
  • Journal Title: Proceedings of International Technical Conference on Circuits/Systems, Computers and Communications 2007 Pages: 451-452
  • Peer Reviewed
• [Presentation] Evaluation of Fine Grain 3-D Integrated Arithmetic Units (2009)
  • Author(s): Ryusuke Egawa, Jubee Tada, Hiroaki Kobayashi, Gensuke Goto
  • Organizer: Proceedings of IEEE 3D System Integration Conference 2009
  • Place of Presentation: 米国サンフランシスコ
  • Year and Date: 2009-09-29
• [Presentation] Gain Based Delay Balancing in the Deep Submicron Era (2008)
  • Author(s): Ryusuke EGAWA, Jubee TADA, Hiroaki Kobayashi, Gensuke GOTO
  • Organizer: Proceedings of The 23nd International Technical Conference on Circuits/Systems, (ITC-CSCC 2008)
  • Place of Presentation: 北九州市
  • Year and Date: 2008-07-08
• [Presentation] ウェーブパイプラインのための遅延調整手法に関する研究 (2008)
  • Author(s): 佐野啓一郎, 多田十兵衛, 江川隆輔, 後藤源助
  • Organizer: 電子情報通信学会集積回路研究会
  • Place of Presentation: 沖縄
  • Year and Date: 2008-03-05
• [Presentation] "Gain-based Delay Balancing Technique for Wave Pipelining" Proceedings of International Technical Conference on Circuits/Systems (2007)
  • Author(s): Jubee Tada, Ryusuke Egawa, Keiichiro Sano, Gensuke Goto, TadaoNakamura
  • Organizer: Computers and Communications 2007
  • Place of Presentation: 韓国釜山
  • Year and Date: 2007-07-10