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Study on design methods for superconducting digital circuit devices utilizing pulse logic

Research Project

Project/Area Number 19K11888
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Review Section Basic Section 60040:Computer system-related
Research InstitutionChukyo University

Principal Investigator

Kito Nobutaka  中京大学, 工学部, 准教授 (90630997)

Project Period (FY) 2019-04-01 – 2022-03-31
Project Status Completed (Fiscal Year 2021)
Budget Amount *help
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2021: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2020: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2019: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
Keywords超伝導ディジタル回路 / パルス論理 / 単一磁束量子回路 / テクノロジマッピング / 設計自動化 / RSFQ回路 / 論理設計 / 超伝導
Outline of Research at the Start

半導体CMOS回路での演算性能向上が難しいことから、新デバイスにより性能の向上を目指す動きが加速している。本研究は超高速かつ省エネルギな超伝導単一磁束量子(RSFQ)回路のためのパルス論理を活用した論理回路設計自動化手法を明らかにする。熟練設計者の手設計レイアウトや、RSFQ回路の回路設計に関する論文の精査により実際に使用されてきたパルス論理を活用した論理の実現方法を抽出し、論理回路の設計自動化に適用する。このほか、パルス論理を活用したRSFQ回路の自動レイアウト手法の開発も視野に入れる。

Outline of Final Research Achievements

We have developed automatic design methods for ultrafast and energy-saving superconducting rapid single flux quantum (RSFQ) circuits. We aimed to realize a compact circuit by utilizing RSFQ circuits' property, i.e., pulse logic utilizing voltage pulses.
Each ordinary logic gate of RSFQ circuits has a clock input terminal. The distribution of the clock signal occupies a large circuit area. A unique gate specific to RSFQ circuits that merges voltage pulses of its inputs can realize logic-OR without a clock signal in a specific situation. We have proposed several methods to reduce the number of clocked gates utilizing the unique gate.
In addition to the design methods, we proposed arithmetic circuits suitable for pulse-logic to explore the design style of RSFQ logic circuits.

Academic Significance and Societal Importance of the Research Achievements

これまで超伝導単一磁束量子(RSFQ)回路の論理設計自動化は散発的に研究されるだけであった。人手による設計ではRSFQ回路特有の素子を活用しコンパクトな回路を設計するが、本研究課題の開始時点では論理設計自動化に導入する方法は明らかでなく、活用できなかった。
本研究課題によりCB(confluence buffer)素子等のRSFQ回路の特有の素子を論理回路の自動設計で活用可能になった。また、今後に向けての研究課題の整理が進んだ。本課題進行中にも国内外の半導体の設計自動化の研究者が参入しており、超伝導ディジタル回路の設計自動化の研究分野としての確立に貢献した。

Report

(4 results)
  • 2021 Annual Research Report   Final Research Report ( PDF )
  • 2020 Research-status Report
  • 2019 Research-status Report
  • Research Products

    (18 results)

All 2022 2021 2020 2019 Other

All Journal Article (6 results) (of which Int'l Joint Research: 1 results,  Peer Reviewed: 6 results,  Open Access: 4 results) Presentation (11 results) (of which Int'l Joint Research: 7 results) Remarks (1 results)

  • [Journal Article] Logic-Depth-Aware Technology Mapping Method for RSFQ Logic Circuits With Special RSFQ Gates2022

    • Author(s)
      KITO, Nobutaka、TAKAGI, Kazuyoshi、TAKAGI, Naofumi
    • Journal Title

      IEEE Transactions on Applied Superconductivity

      Volume: 32 Issue: 4 Pages: 1-5

    • DOI

      10.1109/tasc.2021.3129719

    • Related Report
      2021 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An RSFQ flexible-precision multiplier utilizing bit-level processing2021

    • Author(s)
      KITO, Nobutaka、TAKAGI, Kazuyoshi
    • Journal Title

      Journal of Physics: Conference Series

      Volume: 1975 Issue: 1 Pages: 012025-012025

    • DOI

      10.1088/1742-6596/1975/1/012025

    • Related Report
      2021 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] A Timing Fault Model and an Efficient Timing Fault Simulation Method for Rapid Single-Flux-Quantum Logic Circuits2021

    • Author(s)
      NAKAMURA, Shogo、TAKAGI, Kazuyoshi、KITO, Nobutaka、TAKAGI, Naofumi
    • Journal Title

      Journal of Physics: Conference Series

      Volume: 1975 Issue: 1 Pages: 012026-012026

    • DOI

      10.1088/1742-6596/1975/1/012026

    • Related Report
      2021 Annual Research Report
    • Peer Reviewed / Open Access / Int'l Joint Research
  • [Journal Article] Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Utilizing Special RSFQ Gates2020

    • Author(s)
      Kito Nobutaka、Takagi Kazuyoshi、Takagi Naofumi
    • Journal Title

      IEEE Transactions on Applied Superconductivity

      Volume: 30 Issue: 7 Pages: 1-6

    • DOI

      10.1109/tasc.2020.3012474

    • Related Report
      2020 Research-status Report
    • Peer Reviewed
  • [Journal Article] Logic simulation tool for RSFQ circuits accepting arrivals of multiple pulses in a clock period2020

    • Author(s)
      Kito Nobutaka、Udatsu Shohei、Takagi Kazuyoshi
    • Journal Title

      Journal of Physics: Conference Series

      Volume: 1590 Issue: 1 Pages: 012041-012041

    • DOI

      10.1088/1742-6596/1590/1/012041

    • Related Report
      2020 Research-status Report
    • Peer Reviewed / Open Access
  • [Journal Article] Logic Simulation Tool for RSFQ Circuits Accepting Arrivals of Multiple Pulses in a Clock Period2020

    • Author(s)
      Nobutaka Kito, Shohei Udatsu, and Kazuyoshi Takagi
    • Journal Title

      Journal of Physics: Conference Series

      Volume: -

    • Related Report
      2019 Research-status Report
    • Peer Reviewed / Open Access
  • [Presentation] RSFQ回路のラッチ機能を活用したコンパクトな多項式計算Stochastic Computing回路の設計手法2021

    • Author(s)
      和田航輝、鬼頭信貴
    • Organizer
      2021年電子情報通信ソサイエティ大会
    • Related Report
      2021 Annual Research Report
  • [Presentation] Logic-depth-aware technology mapping method for RSFQ logic circuits with special RSFQ gates2021

    • Author(s)
      KITO, Nobutaka、TAKAGI, Kazuyoshi、TAKAGI, Naofumi
    • Organizer
      15th European Conference on Applied Superconductivity (EUCAS2021)
    • Related Report
      2021 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials2021

    • Author(s)
      WADA, Koki、KITO, Nobutaka
    • Organizer
      34th International Symposium on Superconductivity (ISS2021)
    • Related Report
      2021 Annual Research Report
    • Int'l Joint Research
  • [Presentation] RSFQ Stochastic Computing 回路のための再収斂経路を考慮した演算スケジューリング手法2021

    • Author(s)
      鬼頭信貴
    • Organizer
      電子情報通信学会 2021年総合大会
    • Related Report
      2020 Research-status Report
  • [Presentation] An RSFQ Flexible-Precision Multiplier Utilizing Bit-Level Processing2020

    • Author(s)
      Nobutaka Kito and Kazuyoshi Takagi
    • Organizer
      33rd International Symposium on Superconductivity (ISS2020)
    • Related Report
      2020 Research-status Report
    • Int'l Joint Research
  • [Presentation] ビットレベル処理を用いたRSFQ可変精度行列乗算器の検討2020

    • Author(s)
      鬼頭信貴, 高木一義
    • Organizer
      電子情報通信学会 2020年総合大会
    • Related Report
      2019 Research-status Report
  • [Presentation] Logic Simulation Tool for RSFQ Circuits Accepting Arrivals of Multiple Pulses in a Clock Period2019

    • Author(s)
      Nobutaka Kito, Shohei Udatsu, and Kazuyoshi Takagi
    • Organizer
      32nd International Symposium on Superconductivity (ISS2019)
    • Related Report
      2019 Research-status Report
    • Int'l Joint Research
  • [Presentation] Test Pattern Generation for Timing Faults in Rapid Single-Flux-Quantum Circuits2019

    • Author(s)
      Kazuyoshi Takagi, Mikihiro Ono, Nobutaka Kito, and Naofumi Takagi
    • Organizer
      22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)
    • Related Report
      2019 Research-status Report
    • Int'l Joint Research
  • [Presentation] Rapid Single-Flux-Quantum Matrix Multiplication Circuit Utilizing Bit-Level Processing2019

    • Author(s)
      Nobutaka Kito, Takuya Kumagai, and Kazuyoshi Takagi
    • Organizer
      22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)
    • Related Report
      2019 Research-status Report
    • Int'l Joint Research
  • [Presentation] Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Using the Characteristics of Pulse Logic2019

    • Author(s)
      Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
    • Organizer
      17th International Superconductive Electronics Conference (ISEC 2019)
    • Related Report
      2019 Research-status Report
    • Int'l Joint Research
  • [Presentation] クロック周期内での複数パルス出現を考慮したRSFQ回路シミュレーション2019

    • Author(s)
      宇田津祥平, 鬼頭信貴
    • Organizer
      2019年電子情報通信ソサイエティ大会
    • Related Report
      2019 Research-status Report
  • [Remarks] 作成した論理シミュレーションツール

    • URL

      https://github.com/nkito/RSFQLogicSim

    • Related Report
      2019 Research-status Report

URL: 

Published: 2019-04-18   Modified: 2023-01-30  

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