| Budget Amount *help |
¥39,910,000 (Direct Cost: ¥30,700,000、Indirect Cost: ¥9,210,000)
Fiscal Year 2010: ¥14,560,000 (Direct Cost: ¥11,200,000、Indirect Cost: ¥3,360,000)
Fiscal Year 2009: ¥14,690,000 (Direct Cost: ¥11,300,000、Indirect Cost: ¥3,390,000)
Fiscal Year 2008: ¥10,660,000 (Direct Cost: ¥8,200,000、Indirect Cost: ¥2,460,000)
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| Research Abstract |
In this research, fundamental technologies have been developed from architecture circuit, device design to package design to implement 100 million Gate LSI within 1/5 development period, 1/10 fabrication cost and 1/10 power consumption compared with conventional SoC or SiP technologies. Particularly, by doing (1) Research on large-scale system design methodologies, (2) Research on large-scale design automation technologies, (3) Research on high level verification technologies, achieved the drastic reduction on design and fabrication cost with realizing ultra low power and huge bandwidth communication.
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