Research on design and implementation of Ultra Large scale LSI
| Project/Area Number |
20240004
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Waseda University |
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Principal Investigator |
GOTO Satoshi Waseda University, 理工学術院, 教授 (10367170)
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| Co-Investigator(Renkei-kenkyūsha) |
TAKESHI Yoshimura 早稲田大学, 理工学術院, 教授 (80367177)
SHINJI Kimura 早稲田大学, 理工学術院, 教授 (20183303)
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| Project Period (FY) |
2008 – 2010
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| Project Status |
Completed (Fiscal Year 2010)
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| Budget Amount *help |
¥39,910,000 (Direct Cost: ¥30,700,000、Indirect Cost: ¥9,210,000)
Fiscal Year 2010: ¥14,560,000 (Direct Cost: ¥11,200,000、Indirect Cost: ¥3,360,000)
Fiscal Year 2009: ¥14,690,000 (Direct Cost: ¥11,300,000、Indirect Cost: ¥3,390,000)
Fiscal Year 2008: ¥10,660,000 (Direct Cost: ¥8,200,000、Indirect Cost: ¥2,460,000)
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| Keywords | LSI設計 / LSI実装 / LSIアーキテクチャ / コンピュータ自動設計 / ハードウエア設計 / 設計自動化 / 電子デバイス・集積化回路 / 回路設計・CAD / アルゴリズム / ハードウェア設計 |
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| Research Abstract |
In this research, fundamental technologies have been developed from architecture circuit, device design to package design to implement 100 million Gate LSI within 1/5 development period, 1/10 fabrication cost and 1/10 power consumption compared with conventional SoC or SiP technologies. Particularly, by doing (1) Research on large-scale system design methodologies, (2) Research on large-scale design automation technologies, (3) Research on high level verification technologies, achieved the drastic reduction on design and fabrication cost with realizing ultra low power and huge bandwidth communication.
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Report
(4 results)
Research Products
(310 results)
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[Presentation] A 1080p@60fps multi-standard video decoder chip designed for power and cost efficiency in a system perspective2009
Author(s)
Dajiang Zhou, Zongyuan You, Jiayi Zhu, Ji Kong, Yu Hong, Xianmin Chen, Xuewen He, Chen Xu, Hang Zhang, Jinjia Zhou, Ning Deng, Peilin Liu, Satoshi Goto
Organizer
Symp.VLSI Circuits 2009
Place of Presentation
Kyoto, Japan
Related Report
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