Architecture Design Method for Multi-processor SoC

• Project/Area Number: 20300017
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Computer system/Network
• Research Institution: Osaka University
• Principal Investigator: IMAI Masaharu 大阪大学, 大学院・情報科学研究科, 教授 (50126926)
• Co-Investigator(Kenkyū-buntansha): TAKEUCHI Yoshinori 大阪大学, 大学院・情報科学研究科, 准教授 (70242245) ; SAKANUSHI Keishi 大阪大学, 大学院・情報科学研究科, 助教 (00346173)
• Project Period (FY): 2008 – 2011
• Project Status: Completed (Fiscal Year 2011)
• Budget Amount: ¥19,110,000 (Direct Cost: ¥14,700,000、Indirect Cost: ¥4,410,000); Fiscal Year 2011: ¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000); Fiscal Year 2010: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000); Fiscal Year 2009: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000); Fiscal Year 2008: ¥5,590,000 (Direct Cost: ¥4,300,000、Indirect Cost: ¥1,290,000)
• Keywords: VLSI設計技術 / MPSoC / マルチコア / マルチプロセッサ / IPベース設計 / DVFS / MPSoC (マルチプロセッサSoC) / MPSoC(マルチプロセッサSoC) / マルチコアSoC / 設計最適化

Research Abstract

This research proposed a new exploration method for Multi-Processor SoC architecture and task assignment optimization method, and implemented these methods as prototype design tools. Experimental results show that the proposed method can find solutions that are same quality as the optimal solutions in short time

Research Products

• [Journal Article] A Low-power ASIP Generation Method by Extracting Minimum Execution Conditions (2010)
  • Author(s): Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
  • Journal Title: IPSJ Transactions on System LSI Design Methodology Vol.3 Pages: 222-233
  • NAID: 130000418473
  • Peer Reviewed
• [Journal Article] Optimal Scheme for Search State Space and Scheduling on Multiprocessor systems (2009)
  • Author(s): Hassan A.Youness, Keishi Sakanushi, Yoshinori Takeuchi, Ashraf Salem, Abdel-Moneim Wahdan, Masaharu Imai
  • Journal Title: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences Vol.E92-A, No.4 Pages: 1088-1095
  • NAID: 10026857036
  • Peer Reviewed
• [Presentation] 開始温度を自動で設定するSA法を用いたマルチプロセッサ・タスク割当て最適化手法 (2012)
  • Author(s): 柳父悠一郎, 坂主圭史, 武内良典, 今井正治
  • Organizer: 第156回システムLSI設計技術研究会
  • Place of Presentation: 北九州市
  • Year and Date: 2012-05-30
• [Presentation] 抽象度を変更可能な命令セットシミュレータの提案 (2012)
  • Author(s): 井田健太, 坂主圭史, 武内良典, 今井正治
  • Organizer: 組込み技術とネットワークに関するワークショップ(ETNET)
  • Place of Presentation: 宮城県宮城郡松島町
  • Year and Date: 2012-03-02
• [Presentation] Task Assignment Method for DVS based multiprocessor SoC (2011)
  • Author(s): Yoshinori Takeuchi, Taichiro Shiraishi, Keishi Sakanushi, and Masaharu Imai
  • Organizer: 11th International Forum on Embedded MPSoC and Multicore(MPSoC 2011)
  • Place of Presentation: Beaune,France
  • Year and Date: 2011-07-05
• [Presentation] Task Assignment Method for DVS based multiprocessor SoC (2011)
  • Author(s): Yoshinori Takeuchi, Taichiro Shiraishi, Keishi Sakanushi, Masaharu Imai
  • Organizer: 11th International Forum on Embedded MPSoC and Multicore (MPSoC 2011)
  • Place of Presentation: Beaune, France(招待講演)
  • Year and Date: 2011-07-05
• [Presentation] DVSを用いたマルチプロセッサ・システムのための低消費電力量タスク割当て手法 (2011)
  • Author(s): 白石多一郎, 坂主圭史, 武内良典, 今井正治
  • Organizer: 組込み技術とネットワークに関するワークショップETNET2011
  • Place of Presentation: 沖縄県宮古島
  • Year and Date: 2011-03-18
• [Presentation] DVSを用いたマルチプロセッサ・システムのための低消費電力量タスク割当て手法 (2011)
  • Author(s): 白石多一郎, 坂主圭史, 武内良典, 今井正治
  • Organizer: 情報処理学会SLDM研究会
  • Place of Presentation: 沖縄県宮古市
  • Year and Date: 2011-03-18
• [Presentation] DVSを用いたマルチプロセッサ・システムのための低消費電力量タスク割当て手法 (2011)
  • Author(s): 白石多一郎、坂主圭史、武内良典、今井正治
  • Organizer: 組込み技術とネットワークに関するワークショップETNET2011
  • Place of Presentation: 沖縄県宮古島市
  • Year and Date: 2011-03-18
• [Presentation] Generation of Application-domain Specific Instruction-set Processors (2010)
  • Author(s): Yoshinori Takeuchi, Keishi Sakanushi, and Masaharu Imai
  • Organizer: 2010 International SoC Design Conference
  • Place of Presentation: Incheon, Korea
  • Year and Date: 2010-11-22
• [Presentation] Generation of Application-domain Specific Instruction-set Processors (2010)
  • Author(s): Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai
  • Organizer: 2010 International SoC Design Conference
  • Place of Presentation: Incheon, Korea(招待講演)
  • Year and Date: 2010-11-22
• [Presentation] Generation Method of Decomposed Small Area Instruction Decoder for Configurable Processor (2010)
  • Author(s): Hiroki Ohsawa, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, and Masaharu Imai
  • Organizer: The 16th Workshop on Synthesis And System Integration of Mixed Information Technologies 2010
  • Place of Presentation: Taipei, Taiwan
  • Year and Date: 2010-10-18
• [Presentation] Generation Method of Decomposed Small Area Instruction Decoder for Configurable Processor (2010)
  • Author(s): Hiroki Ohsawa, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
  • Organizer: the 16th Workshop on Synthesis And System Integration of Mixed Information Technologies 2010 (SASIMI 2010)
  • Place of Presentation: 台湾
  • Year and Date: 2010-10-18
• [Presentation] 共有メモリを考慮したSoCアーキテクチャ探索手法の提案 (2009)
  • Author(s): 岡田千尋, 坂主圭史, 武内良典, 今井正治
  • Organizer: 電子情報通信学会2009ソサイエティ大会
  • Place of Presentation: 新潟
  • Year and Date: 2009-09-17
• [Presentation] 応用プログラムのプロファイル情報を用いたマルチプロセッサシステムの最適プロセッサ数の評価手法 (2009)
  • Author(s): 今村多一郎, 坂主圭史, 武内良典, 今井正治
  • Organizer: 電子情報通信学会2009ソサイエティ大会
  • Place of Presentation: 新潟
  • Year and Date: 2009-09-17
• [Presentation] 共有メモリを考慮したSoCアーキテクチャ探索手法の提案 (2009)
  • Author(s): 岡田千尋, 坂主圭史, 武内良典, 今井正治
  • Organizer: 電子情報通信学会2009 基礎・境界ソサイエティ大会
  • Place of Presentation: 新潟県新潟市
  • Year and Date: 2009-09-17
• [Presentation] 応用プログラムのプロファイル情報を用いたマルチプロセッサシステムの最適プロセッサ数の評価手法 (2009)
  • Author(s): 今村多一郎, 坂主圭史, 武内良典, 今井正治
  • Organizer: 電子情報通信学会2009 基礎・境界ソサイエティ大会
  • Place of Presentation: 新潟県新潟市
  • Year and Date: 2009-09-17
• [Presentation] Simulator Generation Method of Configurable Processors for MPSoC (2009)
  • Author(s): Yoshinori Takeuchi
  • Organizer: 9th International Forum on Embedded MPSoC and Multicore (MPSoC'09)
  • Place of Presentation: 米国ジョージア州
  • Year and Date: 2009-08-06
• [Presentation] Simulator Generation Method of Configurable Processors for MPSoC (2009)
  • Author(s): Yoshinori Takeuchi
  • Organizer: 9th International Forum on Embedded MPSoC and Multicore(MPSoC' 09)
  • Place of Presentation: Savannah,アメリカ
  • Year and Date: 2009-08-05
• [Presentation] Simulator Generation Method of Configurable Processors for MPSoC (2009)
  • Author(s): Yoshinori Takeuchi
  • Organizer: 9th International Forum on Embedded MPSoC and Multicore(MPSoC'09)
  • Place of Presentation: Savannah,アメリカ
  • Year and Date: 2009-08-05
• [Presentation] プロセッサ記述からのSystemCベースシミュレータ生成手法の提案 (2008)
  • Author(s): 樋口晃久, 坂主圭史, 武内良典, 今井正治
  • Organizer: 情報処理学会DAシンポジウム2008
  • Place of Presentation: 浜松
  • Year and Date: 2008-08-26