Study on Ultra-Low-Voltage Integrated Circuits for Self-Aligned Particle-Manipulation Technology
Project/Area Number |
20560324
|
Research Category |
Grant-in-Aid for Scientific Research (C)
|
Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Electron device/Electronic equipment
|
Research Institution | Osaka University |
Principal Investigator |
MATSUOKA Toshimasa Osaka University, 工学研究科, 准教授 (80324820)
|
Project Period (FY) |
2008 – 2010
|
Project Status |
Completed (Fiscal Year 2010)
|
Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2010: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2009: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Fiscal Year 2008: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
|
Keywords | 集積回路 / 低消費電力 / 誘電泳動 / 自己整合 / センサ |
Research Abstract |
Sensor-On-CMOS with some sensors for comprehensive decision of situations and prevention of errors by redundancies has a limit in number of sensor types on the same chip in conventional production manners. Self-aligned particle-manipulation technique, which uses small-size quadruple electrodes for particle manipulation based on dielectrophoresis phenomenon and AC-wireless-powered small-size driver circuit for it, is studied, and its feasibility has been demonstrated.
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Report
(4 results)
Research Products
(20 results)