Formal design method of high-performance VLSI datapaths based on computer algebra
| Project/Area Number |
20700041
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system/Network
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| Research Institution | Tohoku University |
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Principal Investigator |
HOMMA Naofumi Tohoku University, 大学院・情報科学研究科, 准教授 (00343062)
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| Project Period (FY) |
2008 – 2009
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| Project Status |
Completed (Fiscal Year 2009)
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| Budget Amount *help |
¥4,160,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥960,000)
Fiscal Year 2009: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
Fiscal Year 2008: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
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| Keywords | 計算機システム / システムオンチップ / VLSI設計技術 / 算術アルゴリズム / 形式的設計 / 計算機代数 / データパス / グレブナー基底 |
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| Research Abstract |
This research project aimed to develop high-level design methodology for arithmetic algorithms, and developed formal verification method of arithmetic algorithms based on computer algebra and its application to arithmetic module generator. In particular, the newly-developed generator can generate typical operations in security systems such as modular exponentiation operations. The generated algorithms can be verified completely by the formal verification method.
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Report
(3 results)
Research Products
(72 results)
