| Project/Area Number |
20K14720
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| Research Category |
Grant-in-Aid for Early-Career Scientists
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| Allocation Type | Multi-year Fund |
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| Review Section |
Basic Section 21010:Power engineering-related
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| Research Institution | Kyushu Institute of Technology (2023)
Kyoto University of Advanced Science (2020-2022) |
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Principal Investigator |
Tripathi Ravi Nath 九州工業大学, 次世代パワーエレクトロ二クス研究センター, 助教 (00869745)
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| Project Period (FY) |
2020-04-01 – 2024-03-31
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| Project Status |
Completed (Fiscal Year 2023)
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| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2022: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
Fiscal Year 2021: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2020: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
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| Keywords | Power device / Gate Driving Control / Parallel-connection / Current balancing / Power converter / Parallel-connected / Current Balancing / Paralleling / SiC / GaN / Power Devices / Parallel Connection / Gate Control / Balancing / Active Balancing / Intelligent Control |
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| Outline of Research at the Start |
The scientific and technological evolution of state-of- the-art devices since its inception has made a leap in power rating. This ultimately leads to extend the horizon for operating range of a single device considering blocking voltage and current capability. However, higher current/voltage ratings of power devices are required for high power conversion and control Enhancement and optimization of the performance of power semiconductor devices are of fundamental concern, especially for the system consisting of parallel/series connected devices.
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| Outline of Final Research Achievements |
The active gate control is employed for the parallel-connected power semiconductor devices and current unbalancing is minimized using active gate control methodology. This active gate delay control is implemented for the SiC power devices as well as the IGBT power devices. The active gate control strategy is employed under the dynamic operation of the device that is turn-on and turn-off. Further the research analysis is performed on the gate signal characteristic study corresponding to the active gate control. The correlation between the device current unbalancing and Miller plateau is realized. A parallel hybrid switch is developed with specific gate driver and inbuilt delay for the appropriate hybrid switching.
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| Academic Significance and Societal Importance of the Research Achievements |
The electrification is necessary to tackle the problem of CO2 emission. The paralleling of the devices are used in high power converters for electrification, the current unbalancing problems addressed in this research will help to create an understanding and possibly provide a solution.
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