| Budget Amount *help |
¥9,360,000 (Direct Cost: ¥7,200,000、Indirect Cost: ¥2,160,000)
Fiscal Year 2012: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2010: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2009: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
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| Research Abstract |
The purpose of this work is to establish a high quality field test method using system-idle time for logic circuits. Especially the method has an ability of detection for aging-induced faults. In general, field test requires short test application time and small memory space while test opportunity is more than once. In this work, a test partitioning and rotating test method is developed in which a given test pattern set is partitioned and a whole test is achieved through multiple test opportunity.
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