A study on high quality field test for VLSIs
Project/Area Number |
21300015
|
Research Category |
Grant-in-Aid for Scientific Research (B)
|
Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Computer system/Network
|
Research Institution | Kyushu Institute of Technology |
Principal Investigator |
KAJIHARA Seiji 九州工業大学, 情報工学研究院, 教授 (80252592)
|
Co-Investigator(Kenkyū-buntansha) |
WEN Xiaoqing 九州工業大学, 情報工学研究院, 教授 (20250897)
|
Co-Investigator(Renkei-kenkyūsha) |
MIYASE Kohei 九州工業大学, 情報工学研究院, 助教 (30452824)
|
Project Period (FY) |
2009 – 2012
|
Project Status |
Completed (Fiscal Year 2012)
|
Budget Amount *help |
¥9,360,000 (Direct Cost: ¥7,200,000、Indirect Cost: ¥2,160,000)
Fiscal Year 2012: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2010: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2009: ¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
|
Keywords | ディペンダブル・コンピューティング / VLSI の設計とテスト / システムオンチップ / 論理回路 / 高信頼設計 / 計算機システム / VLSIの設計とテスト / (1)ディペンダブル・コンピューティング |
Research Abstract |
The purpose of this work is to establish a high quality field test method using system-idle time for logic circuits. Especially the method has an ability of detection for aging-induced faults. In general, field test requires short test application time and small memory space while test opportunity is more than once. In this work, a test partitioning and rotating test method is developed in which a given test pattern set is partitioned and a whole test is achieved through multiple test opportunity.
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Report
(5 results)
Research Products
(83 results)