High-Density New Two-Terminal Resistive Nonvolatile Memory Using SiC and Its Integration Technology
Project/Area Number |
21360164
|
Research Category |
Grant-in-Aid for Scientific Research (B)
|
Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Electron device/Electronic equipment
|
Research Institution | Tokyo University of Agriculture and Technology |
Principal Investigator |
SUDA Yoshiyuki 東京農工大学, 大学院・工学研究院, 教授 (10226582)
|
Project Period (FY) |
2009 – 2011
|
Project Status |
Completed (Fiscal Year 2011)
|
Budget Amount *help |
¥17,810,000 (Direct Cost: ¥13,700,000、Indirect Cost: ¥4,110,000)
Fiscal Year 2011: ¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2010: ¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2009: ¥9,100,000 (Direct Cost: ¥7,000,000、Indirect Cost: ¥2,100,000)
|
Keywords | 集積回路 / 半導体メモリ / SiC / 不揮発性メモリ / 半導体超微細化 / 抵抗変化型 / トンネル効果 / RRAM / 電子デバイス・機器 / メモリ / MIS / 不揮発性 |
Research Abstract |
To evolve the miniaturization and versatility for industrial and consumer electronics which will become core products for future in Japan, we have clarified the relationship between the structure and the operating principle for our proposed new-structured metal/tunneling oxide-layer/electron trapping-layer/SiC/n-Si two-terminal resistive nonvolatile memory and have obtained an on/off current ratio of > 10 and an endurance cycle of >10^4. In addition to the results, we have furthermore devised advanced-type memory by changing materials for the layers and substrate and have obtained important fundamental technologies and guidelines for practical integration applications.
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Report
(4 results)
Research Products
(39 results)