| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2012: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2011: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2010: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2009: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
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| Research Abstract |
According to reduction of a supply voltage, speed-up of an operation speed and scale-down of devise dimensions of VLSIs, malfunction of VLSIscaused by noise is becoming a serious problem. In this study, we developed flip-flopswhich have tolerance for noise induced on a data signal line. As the proposed flip-flops do not require any additional signal and are compatible circuit structureswith existing circuits, it is possible to mix with circuits of conventional design. Furthermore, it was shown that the developed circuit function can be extended to detection of increase and decrease in the delay time of a data signal, and it can apply to correction of signal delay.
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