Development of Low-Noise and Low-Distortion Techniques for High frequency PWM Inverters Using Next Generation Switching Devices
| Project/Area Number |
21560284
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Power engineering/Power conversion/Electric machinery
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| Research Institution | Hokkaido University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
TAKEMOTO Masatsugu 北海道大学, 大学院・情報科学研究科, 准教授 (80313336)
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| Project Period (FY) |
2009 – 2011
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| Project Status |
Completed (Fiscal Year 2011)
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| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2011: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2010: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2009: ¥2,990,000 (Direct Cost: ¥2,300,000、Indirect Cost: ¥690,000)
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| Keywords | 次世代デバイス / インバータ / ノイズ / ひずみ / EMI/EMC / EHI/EMC / EMI / EMC |
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| Research Abstract |
This study has develop low-noise and low-distortion techniques for high frequency PWM inverters using next generation switching devices, such as SiC and GaN. The developed dead-time compensation can almost completely compensate the voltage distortion without restriction of pulse width. A common-noise canceller, which has proposed by the project leader, is applied to the high frequency (100kHz) PWM inverter, and it is demonstrated that core weight is reduced to 1/8, compared with conventional one.
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Report
(4 results)
Research Products
(9 results)
