Design of a logic circuit for finite differencing of Navier-Stokes equations
Project/Area Number |
21656049
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Research Category |
Grant-in-Aid for Challenging Exploratory Research
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Allocation Type | Single-year Grants |
Research Field |
Fluid engineering
|
Research Institution | Tohoku University |
Principal Investigator |
YAMAMOTO Satoru 東北大学, 大学院・情報科学研究科, 教授 (90192799)
|
Co-Investigator(Kenkyū-buntansha) |
SANO Kentaro 東北大学, 大学院・情報科学研究科, 准教授 (00323048)
|
Project Period (FY) |
2009 – 2011
|
Project Status |
Completed (Fiscal Year 2011)
|
Budget Amount *help |
¥3,500,000 (Direct Cost: ¥3,200,000、Indirect Cost: ¥300,000)
Fiscal Year 2011: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2010: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 2009: ¥1,400,000 (Direct Cost: ¥1,400,000)
|
Keywords | 数値流体力学 / ナビエストークス方程式 / 差分計算 / 論理回路 / 低消費電力 |
Research Abstract |
In this study as an innovative computational method for computational fluid dynamics (CFD)to obtain the high performance and to save the electric power of computers which use the computation, a logic circuit of finite difference based on the fractional-step method solving Navier-Stokes equations was designed on the field-programmable gate array (FPGA)device in which the logic circuit can be repeatedly constructed.
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Report
(4 results)
Research Products
(66 results)