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Study on robust circuit design techniques based on physical parameters of semiconductor devices and its Applications

Research Project

Project/Area Number 21680004
Research Category

Grant-in-Aid for Young Scientists (A)

Allocation TypeSingle-year Grants
Research Field Computer system/Network
Research InstitutionKobe University

Principal Investigator

HIROSE Tetsuya  神戸大学, 大学院・工学研究科, 准教授 (70396315)

Project Period (FY) 2009 – 2011
Project Status Completed (Fiscal Year 2011)
Budget Amount *help
¥23,400,000 (Direct Cost: ¥18,000,000、Indirect Cost: ¥5,400,000)
Fiscal Year 2011: ¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2010: ¥7,800,000 (Direct Cost: ¥6,000,000、Indirect Cost: ¥1,800,000)
Fiscal Year 2009: ¥11,050,000 (Direct Cost: ¥8,500,000、Indirect Cost: ¥2,550,000)
KeywordsVLSI設計技術 / LSI / プロセスバラツキ / 温度バラツキ / PVTバラツキ / 高速化技術 / アナログ回路 / ディジタル回路 / しきい値電圧 / オンチップモニタ / 補正回路技術
Research Abstract

In this study, we developed analog and digital circuit design techniques that are tolerant to process and temperature variations. By developing ultra-low power current reference circuit, we can monitor the condition of threshold voltage of MOSFET in each LSI chip. We also proposed compensation architecture of digital circuits by using on-chip variation monitoring circuit. Moreover, we developed robust operational amplifier and comparator circuit that are fundamental analog circuit building blocks. For analog and digital signal processing systems, clock reference circuit and analog-digital converter were investigated. We demonstrated that these circuits operate robustly against process and temperature variations.

Report

(4 results)
  • 2011 Annual Research Report   Final Research Report ( PDF )
  • 2010 Annual Research Report
  • 2009 Annual Research Report
  • Research Products

    (101 results)

All 2012 2011 2010 2009 Other

All Journal Article (18 results) (of which Peer Reviewed: 18 results) Presentation (78 results) Remarks (4 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] A Low-Power Level Shifter with Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs2012

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, and M. Numa
    • Journal Title

      IEEE Journal of Solid-State Circuits

      Volume: (in press)

    • Related Report
      2011 Final Research Report
    • Peer Reviewed
  • [Journal Article] Robust subthreshold CMOS digital circuit design with on-chip adaptive supply voltage scaling technique2011

    • Author(s)
      Y. Osaki, T. Hirose, K. Matsumoto, N. Kuroki, and M. Numa
    • Journal Title

      IEICE Transactions on Electronics

      Volume: vol.E94-C, no.1 Pages: 80-88

    • NAID

      10027984222

    • Related Report
      2011 Final Research Report
    • Peer Reviewed
  • [Journal Article] Temperature-compensated Nano-Ampere Current Reference Circuit with Subthreshold Metal-Oxide-Semiconductor Field Effect Transistor Resistor Ladder2011

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, and M. Numa
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: vol.50, no.4

    • NAID

      210000070303

    • Related Report
      2011 Final Research Report
    • Peer Reviewed
  • [Journal Article] Subthreshold SRAM with Write Assist Technique by Using On-Chip Threshold Voltage Monitoring Circuit2011

    • Author(s)
      K. Matsumoto, T. Hirose, Y. Osaki, N. Kuroki, and M. Numa
    • Journal Title

      IEICE Transactions on Electronics

      Volume: vol.E94-C, no.6 Pages: 1042-1048

    • NAID

      10029804296

    • Related Report
      2011 Final Research Report
    • Peer Reviewed
  • [Journal Article] A Wide Input Voltage Range Level Shifter Circuit for Extremely Low-Voltage Digital LSIs2011

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, and M. Numa
    • Journal Title

      IEICE Electronics Express

      Volume: vol.8, no.12 Pages: 890-896

    • NAID

      130000760960

    • Related Report
      2011 Final Research Report
    • Peer Reviewed
  • [Journal Article] Temperature-compensated nano-ampere current reference circuit with subthreshold metal-oxide-semiconductor field-effect transistor resistor ladder2011

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: vol.50,no.4 Issue: 4S Pages: 04DE08-04DE08

    • DOI

      10.1143/jjap.50.04de08

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] ubthreshold SRAM with write assist technique using on-chip threshold voltage monitoring circuit2011

    • Author(s)
      K.Matsumoto, T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Journal Title

      IEICE TEANSACTIONS on Electronics

      Volume: Vol.94-C Pages: 1042-1048

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs2011

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Journal Title

      IEICE Electronics Express

      Volume: Vol.8 Pages: 890-896

    • NAID

      130000760960

    • Related Report
      2011 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Robust subthreshold CMOS digital circuit design with on-chip adaptive supply voltage scaling technique2011

    • Author(s)
      Y.Osaki, T.Hirose, K.Matsumoto, N.Kuroki, M.Numa
    • Journal Title

      IEICE Transactions on Electronics

      Volume: Vol.E94-C Pages: 80-88

    • NAID

      10027984222

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An on-chip PVT compensation technique with current monitoring circuit for low-voltage CMOS digital LSIs2010

    • Author(s)
      Y.Tsugita, K.Ueno, T.Hirose, T.Asai, Y.Amemiya
    • Journal Title

      IEICE Transactions on Electronics

      Volume: Vol.E93-C Pages: 835-841

    • NAID

      10026826095

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A 1-uW, 600-ppm/℃ current reference circuit consisting of sub-threshold CMOS circuits2010

    • Author(s)
      K.Ueno, T.Hirose, T.Asai, Y.Amemiya
    • Journal Title

      IEEE Transactions on Circuits and Systems II

      Volume: Vol.57, issue 9 Pages: 681-685

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An error diagnosis technique based on clustering of elements2010

    • Author(s)
      K.Shioki, N.Okada, K.Watanabe, T.Hirose, N.Kuroki, M.Numa
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer

      Volume: Vol.E93-A Pages: 2490-2496

    • NAID

      10027985719

    • Related Report
      2010 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Look-ahead active body-biasing scheme for SOI-SRAM with dynamic VDDM control2009

    • Author(s)
      K.Seto, M.Iijima, T.Hirose, M.Numa, A.Tada, T.Ipposhi
    • Journal Title

      VICE Electronics Express Vol.6, No.8

      Pages: 456-460

    • NAID

      130000107526

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A 300-nW, 15-ppm/℃, 20-ppm/V CMOS voltage reference circuit consisting of subthreshold MOSFETs2009

    • Author(s)
      K.Ueno, T.Hirose, T.Asai, Y.Amemiya
    • Journal Title

      IEEE Journal of Solid-State Circuits Vol.44, No.7

      Pages: 2047-2054

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Low-voltage process-compensated VCO with on-chip process monitoring and body-biasing circuit techniques2009

    • Author(s)
      K.Ueno, T.Hirose, T.Asai, Y.Amemiya
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Vol.E92-A

      Pages: 3079-3081

    • NAID

      10026861450

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] An error diagnosis technique based on location sets to rectify subcircuits2009

    • Author(s)
      K.Shioki, N.Okada, T.Ishihara, T.Hirose, N.Kuroki, M.Numa
    • Journal Title

      MICE Trans.on Fundamentals of Electronics, Communications and Computer Vol.E92-A, No.12

      Pages: 3136-3142

    • NAID

      10026861552

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 低電圧CMOSディジタタル回路のプロセスバラツキ補正技術2009

    • Author(s)
      次田祐輔, 廣瀬哲也, 上野憲一, 浅井哲也, 雨宮好仁
    • Journal Title

      映像情報メディア学会誌 Vol.63, No.11

      Pages: 1667-1670

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Journal Article] サブスレッショルドMOSFETを用いたPTAT電流生成のための微小フローティング電圧源回路2009

    • Author(s)
      上野憲一, 廣瀬哲也, 浅井哲也, 雨宮好仁
    • Journal Title

      映像情報メディア学会誌 Vol.63, No.12

      Pages: 1877-1880

    • NAID

      10025988046

    • Related Report
      2009 Annual Research Report
    • Peer Reviewed
  • [Presentation] 高分解能SAR ADCに向けた容量DACの面積削減の検討2012

    • Author(s)
      山内貴仁, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      岡山大学(岡山県)
    • Year and Date
      2012-03-25
    • Related Report
      2011 Annual Research Report
  • [Presentation] 超低電力オペアンプの高速化技術2012

    • Author(s)
      鶴屋由美子, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏, 小林修
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      岡山大学(岡山県)
    • Year and Date
      2012-03-22
    • Related Report
      2011 Annual Research Report
  • [Presentation] 超低電圧ダイナミックコンパレータ回路のオフセットキャリブレーション手法の検討2012

    • Author(s)
      増田長太郎, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      岡山大学(岡山県)
    • Year and Date
      2012-03-22
    • Related Report
      2011 Annual Research Report
  • [Presentation] 適応バイアス型コンパレータを用いたSC型DC-DCコンバータ2012

    • Author(s)
      中村大悟, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      岡山大学(岡山県)
    • Year and Date
      2012-03-22
    • Related Report
      2011 Annual Research Report
  • [Presentation] A delay control technique for low-voltage subthreshold CMOS digital circuits2012

    • Author(s)
      S. Shiga, T. Hirose, Y. Osaki, N. Kuroki, and M. Numa
    • Organizer
      The 17th Workshop on Synthesis And System Integration of Mixed Information technologies(SASIMI)
    • Place of Presentation
      Beppu, Japan
    • Year and Date
      2012-03-09
    • Related Report
      2011 Final Research Report
  • [Presentation] A delay control technique for low-voltage subthreshold CMOS digital circuits2012

    • Author(s)
      S.Shiga, T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      The 17th Workshop on Synthesis And System Integration of Mixed Information technologies
    • Place of Presentation
      ビーコンプラザ(大分県)
    • Year and Date
      2012-03-09
    • Related Report
      2011 Annual Research Report
  • [Presentation] 適応バイアス電流生成技術を用いたナノワットパワー・オペアンプの高速化2012

    • Author(s)
      鶴屋由美子, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      STABCシンポジウムFY2011
    • Place of Presentation
      新横浜国際ホテル(神奈川県)
    • Year and Date
      2012-02-01
    • Related Report
      2011 Annual Research Report
  • [Presentation] Ultra-low power and low voltage circuit design for next-generation power-aware LSI applications2011

    • Author(s)
      T.Hirose
    • Organizer
      International SoC Conference 2011
    • Place of Presentation
      Ramada Plaza jeju Hotel(韓国)
    • Year and Date
      2011-11-17
    • Related Report
      2011 Annual Research Report
  • [Presentation] A 18.9-nA standby current comparator with adaptive bias current generator2011

    • Author(s)
      K.Isono, T.Hirose, K.Tsubaki, N.Kuroki, M.Numa
    • Organizer
      IEEE Asian Solid-State Circuits Conference
    • Place of Presentation
      Ramada Plaza jeju Hotel(韓国)
    • Year and Date
      2011-11-16
    • Related Report
      2011 Annual Research Report
  • [Presentation] A 105-nW CMOS thermal sensor for power-aware applications2011

    • Author(s)
      T.Nagayama, T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      IEEE SENSORS 2011 Conference
    • Place of Presentation
      University of Limerick(アイルランド)
    • Year and Date
      2011-10-30
    • Related Report
      2011 Annual Research Report
  • [Presentation] Current compensation circuit for precise nano-ampere current reference2011

    • Author(s)
      K.Isono, T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      Extended abstract of the 2011 International Conference on Solid State Devices and Materials
    • Place of Presentation
      愛知県産業労働センター(愛知県)
    • Year and Date
      2011-09-29
    • Related Report
      2011 Annual Research Report
  • [Presentation] 超低電力CMOS温度センサの評価2011

    • Author(s)
      永山淑, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会ソサイエティ大会
    • Place of Presentation
      北海道大学(北海道)
    • Year and Date
      2011-09-15
    • Related Report
      2011 Annual Research Report
  • [Presentation] A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs2011

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Organizer
      The 37th European Solid-State Circuits Conference
    • Place of Presentation
      Finlandia Hall(フィンランド)
    • Year and Date
      2011-09-13
    • Related Report
      2011 Annual Research Report
  • [Presentation] コンパレータのバラツキ補正回路を用いた弛張発振回路2011

    • Author(s)
      志賀誠一郎, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会ソサイエティ大会
    • Place of Presentation
      北海道大学(北海道)
    • Year and Date
      2011-09-13
    • Related Report
      2011 Annual Research Report
  • [Presentation] High current efficiency sense amplifier using body-bias control for ultralow-voltage SRAM2011

    • Author(s)
      C.Masuda, T.Hirose, K.Matsumoto, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      The 54th IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Yonsei University(韓国)
    • Year and Date
      2011-08-10
    • Related Report
      2011 Annual Research Report
  • [Presentation] 超低電圧ディジタル回路に向けた入出力論理補正レベルシフタ回路2011

    • Author(s)
      大崎勇士, 廣瀬哲也, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会集積回路研究会
    • Place of Presentation
      広島工業大学(広島県)
    • Year and Date
      2011-07-21
    • Related Report
      2011 Annual Research Report
  • [Presentation] 基板バイアス制御を用いた超低電圧センスアンプ回路の高速化2011

    • Author(s)
      増田長太郎, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会集積回路研究会
    • Place of Presentation
      広島工業大学(広島県)
    • Year and Date
      2011-07-21
    • Related Report
      2011 Annual Research Report
  • [Presentation] A level shifter circuit design by using input/output voltage monitoring technique for ultra-low voltage digital CMOS LSIs2011

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Organizer
      9th IEEE International NEWCAS conference
    • Place of Presentation
      Hotel Mercure(フランス)
    • Year and Date
      2011-06-27
    • Related Report
      2011 Annual Research Report
  • [Presentation] 熱電変換素子を用いた電力変換インターフェース回路2011

    • Author(s)
      斉藤友輔, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] サブスレッショルドLSIに適したオンチップ電源回路の検討2011

    • Author(s)
      中村大悟, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] 極低消費電力バンドギャップリファレンス回路の高精度化2011

    • Author(s)
      北村準也, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] 超低電圧SRAM用センスアンプ回路のプリチャージ動作の高速化2011

    • Author(s)
      増田長太郎, 廣瀬哲也, 大崎勇士, 松本啓, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] 超低電力CMOSスマート温度センサ回路2011

    • Author(s)
      永山淑, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] サブスレッショルド・ディジタルLSIに向けた遅延制御回路技術2011

    • Author(s)
      志賀誠一郎, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] ナノアンペア電流源回路の電流バラツキ補正2011

    • Author(s)
      磯野航輔, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東京都市大学(東京都)
    • Year and Date
      2011-03-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] A 95-nA, 523ppm/C, 0.6-uW CMOS Current Reference Circuit with Subthreshold MOS Resistor Ladder2011

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Organizer
      The 16th Asia and South Pacific Design Automation Conference
    • Place of Presentation
      パシフィコ横浜(神奈川県)
    • Year and Date
      2011-01-26
    • Related Report
      2010 Annual Research Report
  • [Presentation] Ultra-Low Power and Low Voltage Circuit Design for Next-Generation Power-Aware LSI Applications2011

    • Author(s)
      T. Hirose
    • Organizer
      International SoC Conference 2011
    • Place of Presentation
      Jeju, Korea
    • Related Report
      2011 Final Research Report
  • [Presentation] A 18. 9-nA Standby Current Comparator with Adaptive Bias Current Generator2011

    • Author(s)
      K. Isono, T. Hirose, K. Tsubaki, N. Kuroki, M. Numa
    • Organizer
      Proc. of Tech. Papers, IEEE Asian Solid-State Circuits Conference 2011
    • Place of Presentation
      Jeju, Korea
    • Related Report
      2011 Final Research Report
  • [Presentation] Current Compensation Circuit for Precise Nano-Ampere Current Reference2011

    • Author(s)
      K. Isono, T. Hirose, Y. Osaki, N. Kuroki, M. Numa
    • Organizer
      Extended abstract of the 2011 International Conference on Solid State Devices and Materials
    • Place of Presentation
      Nagoya, Japan
    • Related Report
      2011 Final Research Report
  • [Presentation] A 105-nW CMOS Thermal Sensor for Power-Aware Applications2011

    • Author(s)
      T. Nagayama, T. Hirose, Y. Osaki, N. Kuroki, M. Numa
    • Organizer
      10th IEEE Conference on Sensors
    • Place of Presentation
      Limerick, Ireland
    • Related Report
      2011 Final Research Report
  • [Presentation] A Level Shifter with Logic Error Correction Circuit for Extremely Low-Voltage Digital CMOS LSIs2011

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, M. Numa
    • Organizer
      37th IEEE European Solid-State Circuits Conference(ESSCIRC)
    • Place of Presentation
      Helsinki, Finland
    • Related Report
      2011 Final Research Report
  • [Presentation] High Current Efficiency Sense Amplifier Using Body-Bias Control for Ultra-Low-Voltage SRAM2011

    • Author(s)
      C. Masuda, T. Hirose, K. Matsumoto, Y. Osaki, N. Kuroki, M. Numa
    • Organizer
      54th IEEE International Midwest Symposium on Circuits and Systems(MWSCAS)
    • Place of Presentation
      Souel, Korea
    • Related Report
      2011 Final Research Report
  • [Presentation] A Level Shifter Circuit Design by Using Input/Output Voltage Monitoring Technique for Ultra-Low Voltage Digital CMOS LSIs2011

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, M. Numa
    • Organizer
      9th IEEE International NEWCAS conference
    • Place of Presentation
      Bordeaux, France
    • Related Report
      2011 Final Research Report
  • [Presentation] A 95-nA, 523ppm/C, 0. 6-uW CMOS Current Reference Circuit with Subthreshold MOS Resistor Ladder2011

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, M. Numa
    • Organizer
      The 16th Asia and South Pacific Design Automation Conference
    • Place of Presentation
      Yokohama, Japan
    • Related Report
      2011 Final Research Report
  • [Presentation] 微小オフセット電圧による温度特性を改善した基準電流源回路2010

    • Author(s)
      大崎勇士, 廣瀬哲也, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会第24回シリコンアナログRF研究会
    • Place of Presentation
      東京工業大学(東京都)
    • Year and Date
      2010-11-22
    • Related Report
      2010 Annual Research Report
  • [Presentation] A CMOS Bandgap and Sub-Bandgap Voltage Reference Circuits for Nanowatt Power LSIs2010

    • Author(s)
      T.Hirose, K.Ueno, N.Kuroki, M.Numa
    • Organizer
      IEEE Asian Solid-State Circuits Conference 2011
    • Place of Presentation
      Crowne Plaza Park View Wuzhou Beijing(中国)
    • Year and Date
      2010-11-09
    • Related Report
      2010 Annual Research Report
  • [Presentation] MOSFETのしきい値電圧を参照した極低電力LSI用基準電圧源回路2010

    • Author(s)
      廣瀬哲也
    • Organizer
      北海道地域3大学新技術説明会
    • Place of Presentation
      JSTホール(東京都)(招待講演)
    • Year and Date
      2010-10-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] Temperature Compensated Nano-Ampere CMOS Current Reference Circuit Using Small Offset Voltage2010

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Organizer
      2010 International Conference on Solid State Devices and Materials
    • Place of Presentation
      東京大学(東京都)
    • Year and Date
      2010-09-23
    • Related Report
      2010 Annual Research Report
  • [Presentation] 書き込み安定性を向上させたサブスレッショルドSRAM2010

    • Author(s)
      松本啓, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会ソサイエティ大会
    • Place of Presentation
      大阪府立大学(大阪府)
    • Year and Date
      2010-09-16
    • Related Report
      2010 Annual Research Report
  • [Presentation] TFFを用いた相補構成スイッチトキャパシタ型DC-DCコンバータ2010

    • Author(s)
      辻川琢也, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会ソサイエティ大会
    • Place of Presentation
      大阪府立大学(大阪府)
    • Year and Date
      2010-09-16
    • Related Report
      2010 Annual Research Report
  • [Presentation] A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities2010

    • Author(s)
      T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      The 36th European Solid-State Circuits Conference
    • Place of Presentation
      Barcelo Renacimiento Hotel(スペイン)
    • Year and Date
      2010-09-14
    • Related Report
      2010 Annual Research Report
  • [Presentation] 適応バイアス技術を用いた超低電力コンパレータのチップ測定2010

    • Author(s)
      椿啓志, 廣瀬哲也, 黒木修隆, 沼昌宏
    • Organizer
      STARCフォーラム/シンポジウム2010
    • Place of Presentation
      新横浜国際ホテル(神奈川県)
    • Year and Date
      2010-08-26
    • Related Report
      2010 Annual Research Report
  • [Presentation] Nano-Ampere CMOS Current Reference with Little Temperature Dependence Using Small Offset Voltage2010

    • Author(s)
      Y.Osaki, T.Hirose, N.Kuroki, M.Numa
    • Organizer
      2010 IEEE International 53rd Midwest Symposium on Circuits and Systems
    • Place of Presentation
      The Westin Seattle(米国)
    • Year and Date
      2010-08-03
    • Related Report
      2010 Annual Research Report
  • [Presentation] Write-Assisted Subthreshold SRAM by Using On-Chip Threshold Voltage Monitoring Circuit2010

    • Author(s)
      K.Matsumoto, T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      2010 IEEE International 53rd Midwest Symposium on Circuits and Systems
    • Place of Presentation
      The Westin Seattle(米国)
    • Year and Date
      2010-08-02
    • Related Report
      2010 Annual Research Report
  • [Presentation] 低電圧ディジタルLSIのためのレベルコンバータ回路2010

    • Author(s)
      大崎勇士, 廣瀬哲也, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会集積回路研究会
    • Place of Presentation
      常翔学園大阪センター(大阪府)
    • Year and Date
      2010-07-23
    • Related Report
      2010 Annual Research Report
  • [Presentation] Reference Circuit Design for Nano-Power Subthreshold CMOS LSIs2010

    • Author(s)
      T.Hirose
    • Organizer
      2010 CMOS Emerging Technologies Workshop
    • Place of Presentation
      Hilton Resort and Spa(カナダ)(招待講演)
    • Year and Date
      2010-05-20
    • Related Report
      2010 Annual Research Report
  • [Presentation] 超低電力で動作するオンチップ参照クロック源2010

    • Author(s)
      磯野航輔, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      LSIとシステムのワークショップ2010
    • Place of Presentation
      北九州国際会議場(福岡県)
    • Year and Date
      2010-05-18
    • Related Report
      2010 Annual Research Report
  • [Presentation] サブスレッショルドLSIにむけた低電圧レギュレータ回路2010

    • Author(s)
      永山淑, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      LSIとシステムのワークショップ2010
    • Place of Presentation
      北九州国際会議場(福岡県)
    • Year and Date
      2010-05-18
    • Related Report
      2010 Annual Research Report
  • [Presentation] サブスレッショルド・ディジタル回路のためのオンチップ遅延バラツキ補正回路の評価2010

    • Author(s)
      大崎勇士, 廣瀬哲也, 松本啓, 辻川琢也, 黒木修隆, 沼昌宏
    • Organizer
      LSIとシステムのワークショップ2010
    • Place of Presentation
      北九州国際会議場(福岡県)
    • Year and Date
      2010-05-18
    • Related Report
      2010 Annual Research Report
  • [Presentation] デューティ制御回路を用いたスイッチトキャパシタ型DC-DCコンバータ2010

    • Author(s)
      辻川琢也, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] 低電圧サブスレッショルドLSIに向けたリニア・レギュレータ回路2010

    • Author(s)
      永山淑, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] 超低電力サブスレッショルドCMOS回路に向けた電流源回路2010

    • Author(s)
      廣瀬哲也
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-17
    • Related Report
      2009 Annual Research Report
  • [Presentation] Source-Coupled Logic回路を用いたサブスレッショルドSRAMセルの検討2010

    • Author(s)
      松本啓, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-17
    • Related Report
      2009 Annual Research Report
  • [Presentation] 適応バイアス技術を用いた極低消費電流コンパレータ2010

    • Author(s)
      椿啓志, 廣瀬哲也, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-17
    • Related Report
      2009 Annual Research Report
  • [Presentation] サブスレッショルドCMOSディジタル回路の遅延バラツキ補正アーキテクチャの評価2010

    • Author(s)
      大崎勇士, 廣瀬哲也, 松本啓, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-17
    • Related Report
      2009 Annual Research Report
  • [Presentation] PVTバラツキ耐性を有する基準クロック発振回路2010

    • Author(s)
      磯野航輔, 廣瀬哲也, 大崎勇士, 松本啓, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会総合大会
    • Place of Presentation
      東北大学(宮城県)
    • Year and Date
      2010-03-16
    • Related Report
      2009 Annual Research Report
  • [Presentation] A CMOS Bandgap and Sub-Bandgap Voltage Reference Circuits for Nanowatt Power LSIs2010

    • Author(s)
      T. Hirose, K. Ueno, N. Kuroki, M. Numa
    • Organizer
      Proc. of Tech. Papers, IEEE Asian Solid-State Circuits Conference 2010
    • Place of Presentation
      Beijing, China
    • Related Report
      2011 Final Research Report
  • [Presentation] Temperature Compensated Nano-Ampere CMOS Current Reference Circuit Using Small Offset Voltage2010

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, M. Numa
    • Organizer
      Extended abstract of the 2010 International Conference on Solid State Devices and Materials
    • Place of Presentation
      Tokyo, Japan
    • Related Report
      2011 Final Research Report
  • [Presentation] A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities2010

    • Author(s)
      T. Hirose, Y. Osaki, N. Kuroki, M. Numa
    • Organizer
      The 36th European Solid-State Circuits Conference
    • Place of Presentation
      Sevilla, Spain
    • Related Report
      2011 Final Research Report
  • [Presentation] Nano-Ampere CMOS Current Reference with Little Temperature Dependence Using Small Offset Voltage2010

    • Author(s)
      Y. Osaki, T. Hirose, N. Kuroki, M. Numa
    • Organizer
      2010 IEEE International 53rd Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Seattle
    • Related Report
      2011 Final Research Report
  • [Presentation] Write-Assisted Subthreshold SRAM by Using On-Chip Threshold Voltage Monitoring Circuit2010

    • Author(s)
      K. Matsumoto, T. Hirose, Y. Osaki, N. Kuroki, M. Numa
    • Organizer
      2010 IEEE International 53rd Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Seattle
    • Related Report
      2011 Final Research Report
  • [Presentation] Reference Circuit Design for Nano-Power Subthreshold CMOS LSIs2010

    • Author(s)
      T. Hirose
    • Organizer
      2010 CMOS Emerging Technologies Workshop
    • Place of Presentation
      Whistler, BC, CANADA
    • Related Report
      2011 Final Research Report
  • [Presentation] An on-chip delay compensation for nano-power subthreshold CMOS digital LSIs2010

    • Author(s)
      Y. Osaki, T. Hirose, K. Matsumoto, T. Tsujikawa, K. Tsubaki, N. Kuroki, M. Numa
    • Organizer
      Workshop on Information, Nano and Photonics Technology 2009
    • Place of Presentation
      WINPTech2009
    • Related Report
      2011 Final Research Report
  • [Presentation] An on-chip delay compensation for nano-power subthreshold CMOS digital LSIs2009

    • Author(s)
      Y.Osaki, T.Hirose, K.Matsumoto, T.Tsujikawa, K.Tsubaki, N.Kuroki, M.Numa
    • Organizer
      Workshop on Information, Nano and Photonits Technology 2009
    • Place of Presentation
      神戸大学(兵庫県)
    • Year and Date
      2009-12-02
    • Related Report
      2009 Annual Research Report
  • [Presentation] 極低消費電力LSIのためのCMOS参照電流源回路2009

    • Author(s)
      上野憲一, 廣瀬哲也, 浅井哲也, 雨宮好仁
    • Organizer
      電気学会 電子回路研究会
    • Place of Presentation
      ホテルメリージュ(宮崎県)
    • Year and Date
      2009-10-29
    • Related Report
      2009 Annual Research Report
  • [Presentation] 極低電力サブスレッショルド・ディジタル回路のオンチップ遅延バラツキ補正技術2009

    • Author(s)
      大崎勇士, 廣瀬哲也, 松本啓, 黒木修隆, 沼昌宏
    • Organizer
      電子情報通信学会集積回路研究会
    • Place of Presentation
      キャンパス・イノベーションセンター東京(東京都)
    • Year and Date
      2009-10-02
    • Related Report
      2009 Annual Research Report
  • [Presentation] Variation Tolerant Subthreshold Adder Design for Ultra-low Power LSIs2009

    • Author(s)
      Y.Osaki, T.Hirose, K.Matsumoto, N.Kuroki, M.Numa
    • Organizer
      The 35th European Solid-State Circuits Conference
    • Place of Presentation
      Divani Caravel Hotel(ギリシア)
    • Year and Date
      2009-09-14
    • Related Report
      2009 Annual Research Report
  • [Presentation] Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters2009

    • Author(s)
      K.Matsumoto, T.Hirose, Y.Osaki, N.Kuroki, M.Numa
    • Organizer
      52nd.IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Fiesta Americana Condesa Hotel(メキシコ)
    • Year and Date
      2009-08-04
    • Related Report
      2009 Annual Research Report
  • [Presentation] Delay-compensation techniques for ultra-low-power subthreshold CMOS digital LSIs2009

    • Author(s)
      Y.Osaki, T.Hirose, K.Matsumoto, N.Kuroki, M.Numa
    • Organizer
      52nd.IEEE International Midwest Symposium on Circuits and Systems
    • Place of Presentation
      Fiesta Americana Condesa Hotel(メキシコ)
    • Year and Date
      2009-08-03
    • Related Report
      2009 Annual Research Report
  • [Presentation] 逆流電流遮断による同期整流型DC-DCコンバータの電力変換効率改善2009

    • Author(s)
      辻川琢也, 廣瀬哲也, 大崎勇士, 松本啓, 黒木修隆, 沼昌宏
    • Organizer
      VDECデザイナーズフォーラム2009
    • Place of Presentation
      東京大学(東京都)
    • Year and Date
      2009-06-06
    • Related Report
      2009 Annual Research Report
  • [Presentation] PVTバラツキ特性を改善したサブスレッショルド電流源2009

    • Author(s)
      松本啓, 廣瀬哲也, 鬼頭豊明, 大崎勇士, 黒木修隆, 沼昌宏
    • Organizer
      VDECデザイナーズフォーラム2009
    • Place of Presentation
      東京大学(東京都)
    • Year and Date
      2009-06-06
    • Related Report
      2009 Annual Research Report
  • [Presentation] On-chip PVT compensation techniques for low-voltage CMOS digital LSIs2009

    • Author(s)
      Tsugita Y., Ueno K., Hirose T., Asai T., Amemiya Y.
    • Organizer
      2009 International Symposium on Circuits and Syatema
    • Place of Presentation
      Taipei International Convention Center(台湾)
    • Year and Date
      2009-05-24
    • Related Report
      2009 Annual Research Report
  • [Presentation] 低電圧CMOSディジタル集積回路のためのPVTバラツキ補償技術2009

    • Author(s)
      次田祐輔, 上野憲一, 廣瀬哲也, 浅井哲也, 雨宮好仁
    • Organizer
      LSIとシステムのワークショップ2009
    • Place of Presentation
      北九州国際議場(福岡県)
    • Year and Date
      2009-05-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] インダクタの逆流電流検出回路を用いた高効率同期整流型DC-DCコンバータ2009

    • Author(s)
      辻川琢也, 廣瀬哲也, 大崎勇士, 松本啓, 黒木修隆, 沼昌宏
    • Organizer
      LSIとシステムのワークショップ2009
    • Place of Presentation
      北九州国際会議場(福岡県)
    • Year and Date
      2009-05-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] MOSFETのキャリア移動度温度特性を利用した基準電流源回路2009

    • Author(s)
      松本啓, 廣瀬哲也, 鬼頭豊明, 大暗勇士, 黒木修隆, 沼昌宏
    • Organizer
      LSIとシステムのワークショップ2009
    • Place of Presentation
      北九州国際会議場(福岡県)
    • Year and Date
      2009-05-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] サブスレッショルド・ディジタル回路における遅延時間制御の-設計手法2009

    • Author(s)
      大峙勇士, 廣瀬哲也, 松本啓, 辻川琢也, 黒木修隆, 沼昌宏
    • Organizer
      LSIとシステムのワークショップ2009
    • Place of Presentation
      北九州国際会議場(福岡県)
    • Year and Date
      2009-05-19
    • Related Report
      2009 Annual Research Report
  • [Presentation] Variation Tolerant Subthreshold Adder Design for Ultra-low Power LSIs2009

    • Author(s)
      Y. Osaki, T. Hirose, K. Matsumoto, N. Kuroki, M. Numa
    • Organizer
      The 35th European Solid-State Circuits Conference
    • Place of Presentation
      Athens, Greece
    • Related Report
      2011 Final Research Report
  • [Presentation] Switching-voltage detection and compensation circuits for ultra-low-voltage CMOS inverters, Delay-compensation techniques for ultra-low-power subthreshold CMOS digital LSIs2009

    • Author(s)
      K. Matsumoto, T. Hirose, Y. Osaki, N. Kuroki, M. Numa
    • Organizer
      52nd IEEE International Midwest Symposium on Circuits and Systems
    • Related Report
      2011 Final Research Report
  • [Remarks]

    • URL

      http://cas.eedept.kobe-u.ac.jp

    • Related Report
      2011 Final Research Report
  • [Remarks]

    • URL

      http://cas.eedept.kobe-u.ac.jp/~hirose/

    • Related Report
      2011 Annual Research Report
  • [Remarks]

    • URL

      http://cas.eedept.kobe-u.ac.jp/~hirose/

    • Related Report
      2010 Annual Research Report
  • [Remarks]

    • URL

      http://cas.eedept.kobe-u.ac.jp/~hirose/

    • Related Report
      2009 Annual Research Report
  • [Patent(Industrial Property Rights)] コンパレータ回路2011

    • Inventor(s)
      廣瀬哲也,椿啓志,磯野航輔
    • Industrial Property Rights Holder
      神戸大学
    • Industrial Property Number
      2011-209587
    • Filing Date
      2011-09-26
    • Related Report
      2011 Final Research Report

URL: 

Published: 2009-04-01   Modified: 2016-04-21  

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