Development of Self-Repair Dependable system on FPGA
| Project/Area Number |
22300018
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | Kumamoto University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
KUGA Morihiro 熊本大学, 自然科学研究科, 准教授 (80243989)
AMAGASAKI Motoki 熊本大学, 自然科学研究科, 助教 (50467974)
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| Project Period (FY) |
2010 – 2012
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| Project Status |
Completed (Fiscal Year 2012)
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| Budget Amount *help |
¥18,460,000 (Direct Cost: ¥14,200,000、Indirect Cost: ¥4,260,000)
Fiscal Year 2012: ¥2,600,000 (Direct Cost: ¥2,000,000、Indirect Cost: ¥600,000)
Fiscal Year 2011: ¥5,980,000 (Direct Cost: ¥4,600,000、Indirect Cost: ¥1,380,000)
Fiscal Year 2010: ¥9,880,000 (Direct Cost: ¥7,600,000、Indirect Cost: ¥2,280,000)
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| Keywords | ディペンダブルシステム / FPGA / リコンフィギャラブルシステム |
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| Research Abstract |
SRAM-based field programmable gate arrays (FPGAs) are vulnerableto a soft-errors and physical hard-errors. In order to overcome this issues, our goalis the development of self-repair dependable system on FPGA using following three factors.First, we propose the Triple Modular Redundancy (TMR) scheme coupled with the dynamicpartial reconfiguraition to remove SEU from the FPGA’s configuration memory. Second,we propose an evaluation method that provides results in terms of the realistic failurein time (FIT) by using reconfiguration-based fault-injection analysis. By using theproposed method, we successfully evaluated a TMR circuit and could discuss the resultin terms of realistic FIT data. Finally, a uniforming design technique for PRRs(PartialReconfigurable Regions) are introduced in order to relocate their PRB(PartialReconfigurable Block). Additionally, our design technique enables to implement largepartial module by combining neighboring PRRs.
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Report
(4 results)
Research Products
(73 results)
