Encoding of Three Dimensional Floorplan and its Theory
| Project/Area Number |
22500013
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Fundamental theory of informatics
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| Research Institution | Niigata University |
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Principal Investigator |
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| Project Period (FY) |
2010 – 2012
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| Project Status |
Completed (Fiscal Year 2012)
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| Budget Amount *help |
¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Fiscal Year 2012: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2011: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2010: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
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| Keywords | アルゴリズム / フロアプラン / 離散構造 / 符号化 / レイアウト設計 / VLSI / 数理工学 |
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| Research Abstract |
For VLSI layout design, many floorplan representations have been proposed since the mid-1990s. In the present study, we have achieved results on encoding multi-layer and 3D models of three dimensional floorplan: the former involves encoding, counting, and enumeration of floorplan; the latter involves encoding of floorplan.
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Report
(4 results)
Research Products
(19 results)
