Investigation of SiGe/Si hetero interface to provide a device for producing multi-valued signals using light-induced current modulation

• Project/Area Number: 22560339
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Hokkaido Institute of Technology
• Principal Investigator: FUJINAGA Kiyohisa 北海道科学大学, 創生工学部, 教授 (40285515)
• Project Period (FY): 2010-04-01 – 2014-03-31
• Project Status: Completed (Fiscal Year 2013)
• Budget Amount: ¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000); Fiscal Year 2013: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000); Fiscal Year 2012: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000); Fiscal Year 2011: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000); Fiscal Year 2010: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
• Keywords: シリコン・ゲルマニウム / SOI / 電界効果素子 / バックゲート / 正孔電流 / 実効移動度 / 結晶成長 / 先端機能デバイス / 半導体物性 / 電子デバイス・機器 / シミュレーション / SiGe量子井戸 / 光誘起電流 / 光誘起

Research Abstract

A device for producing multi-valued signals using light-induced current modulation was investigated. The device structure consisted of a light-receiving part for generating holes by laser irradiation and a p-type MOSFET for detecting hole current. The light-receiving part was made by SiGe quantum wells on SOI substrate. The relationship between Si barrier layer thickness and quantum energy level was obtained by the computer simulation and the simulated data was applied to design the light-receiving part structure. The MOSFET with buried SiGe quantum well channel was formed by using the buried silicon oxide of SOI substrate as the gate oxide. The device characteristics of MOSFET showed that the device was useful as the MOSFET for detecting and amplifying hole current.

Research Products

• [Journal Article] SIMOX基板の埋め込み酸化膜をゲート酸化膜に用いたSiGe p-MOSFETの電気特性 (2014)
  • Author(s): 藤永清久
  • Journal Title: 電子情報通信学会論文誌C Volume: Vol. J97-C,No. 5 Pages: 246-248
  • URL: http://search.ieice.org/bin/index.php?category=C&lang=J&curr=1
  • Peer Reviewed
• [Journal Article] Practice of HDL Education Providing Students a Sense of Achievement (2014)
  • Author(s): 藤永清久
  • Journal Title: Journal of JSEE Volume: 62 Issue: 1 Pages: 1_72-1_76
  • DOI: 10.4307/jsee.62.1_72
  • NAID: 130003393184
  • ISSN: 1341-2167, 1881-0764
  • Peer Reviewed
• [Journal Article] SIMOX基板の埋め込み酸化膜をゲートに用いたSiGe p-MOSFETの電気特性 (2014)
  • Author(s): 藤永清久
  • Journal Title: 電子情報通信学会論文誌C Volume: J97-C Pages: 246-248
  • Peer Reviewed
• [Journal Article] Effective hole mobility in SiGe buried-channel well MOSFETs on SOI by low-pressure CVD (2013)
  • Author(s): K. Fujinaga
  • Journal Title: ECS. J. Solid State Sci. Technol. Volume: Vol. 2, No. 9 Issue: 9 Pages: Q142-Q146
  • DOI: 10.1149/2.007309jss
  • Peer Reviewed
• [Presentation] エージェント生産システムにおけるハイブリッドスケジューリングに関する研究 (2013)
  • Author(s): 蔵徹郎,藤永清久
  • Organizer: 電子情報通信学会北海道支部インターネットシンポジウム
• [Presentation] ジョブショップスケジューリングにおけるGAと再帰的伝搬法の比較検討 (2012)
  • Author(s): 蔵徹郎,藤永清久
  • Organizer: 日本経営工学会秋季研究大会
  • Place of Presentation: 大阪工業大学(予稿集,D16)
• [Presentation] GAと再帰的伝搬法を用いたジョブショップスケジューリング (2012)
  • Author(s): 蔵徹郎,藤永清久
  • Organizer: 電気・情報関係学会北海道支部連合大会
  • Place of Presentation: 北海道大学(No. 189)
• [Presentation] 機械故障による生産遅延発生時における再スケジューリングの最適化 (2012)
  • Author(s): 蔵徹郎,藤永清久
  • Organizer: 電子情報通信学会基礎・境界ソサイエティ大会
  • Place of Presentation: 岐阜大学(基礎・境界論文集,A-12-8)
• [Presentation] 再帰的伝搬法に基づく自立分散型のマシンスケジューリング (2012)
  • Author(s): 蔵徹郎,藤永清久
  • Organizer: 電子情報通信学会北海道支部インターネットシンポジウム