Behavioral Synthesis Technology for FPGAs
Project/Area Number |
22700050
|
Research Category |
Grant-in-Aid for Young Scientists (B)
|
Allocation Type | Single-year Grants |
Research Field |
Computer system/Network
|
Research Institution | Ritsumeikan University |
Principal Investigator |
|
Project Period (FY) |
2010 – 2011
|
Project Status |
Completed (Fiscal Year 2011)
|
Budget Amount *help |
¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
Fiscal Year 2011: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2010: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
|
Keywords | 動作合成 / 設計自動化 / FPGA / システムオンチップ |
Research Abstract |
We have developed behavioral synthesis technologies for Field-Programmable Gate Arrays(FPGSs). Our work minimizes the delay of multiplexers on critical paths through optimal allocation and binding of registers and functional resources. We have achieved approximately 10% performance improvement against a state-of-the-art technique.
|
Report
(3 results)
Research Products
(25 results)