| Budget Amount *help |
¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000)
Fiscal Year 2012: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
Fiscal Year 2011: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2010: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
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| Research Abstract |
High-level synthesis technologies that convert C program to hardware module have been researched and developed in order to reduce hardware design burden. However, the conventional HLS technologies have concentrated on generating an efficient data processing hardware but not the data memory access. This researchestablishes a generic method to generate the hardware module exactly that can hide the memory access latency on several HLS tools. The experimental results show that our method can reduce the design burden and does not affect the hardware size, whileimproving the performance by the memory latency hiding.
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