Study on IP Implementation of a Dependable Controller using NLG
| Project/Area Number |
23650025
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| Research Category |
Grant-in-Aid for Challenging Exploratory Research
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| Allocation Type | Multi-year Fund |
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| Research Field |
Computer system/Network
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| Research Institution | Toyota Technological Institute |
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Principal Investigator |
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| Project Period (FY) |
2011 – 2012
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| Project Status |
Completed (Fiscal Year 2012)
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| Budget Amount *help |
¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2012: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2011: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
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| Keywords | リコンフィギャラブルシステム / NLG (Neural Logic Gate) / 可逆論理ゲート / 逆問題解法システム / ディペンダブル制御 / 連想型可逆演算回路 / SDNN/V シミュレータ / K-out-of-N設計規則 / Between-L-and-K-out-of-N / 連想型多入力論理回路 / 人工ニューロン / 制約充足集合 |
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| Research Abstract |
he study purposes are (1) circuit simplification and IPimplementation of Neural Logic Gate, abbreviated as NLG, which uses the input-outputrecall function in a Hopfield ANN, (2) evaluation of the dependability in 3-phase DC motorcontrol using the NLG IP, (3) distribution of the developed NLG IP as free. We havesucceeded in the circuit simplification of NLG and a part of NLG IP implementation.Because of the IP timing bug in real-time usage, however, we could not evaluate theproposed dependable-controller, and not deriver the final NLG IP by Apr. 2013.
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Report
(3 results)
Research Products
(3 results)
